[SRC] updated Spatz cluster peripheral to use 1 bit

hw/system/spatz_cluster/src/spatz_cluster_peripheral/spatz_cluster_peripheral_reg.hjson

@@ -434,7 +434,7 @@
         hwaccess: "hro",
         resval: "0",
         fields: [{
-            bits: "31:0",
+            bits: "0:0",
             name: "EOC_EXIT",
             desc: "Indicates the end of computation and exit status."
         }]

hw/system/spatz_cluster/src/spatz_cluster_peripheral/spatz_cluster_peripheral_reg_pkg.sv

@@ -148,7 +148,7 @@ package spatz_cluster_peripheral_reg_pkg;
   } spatz_cluster_peripheral_reg2hw_cluster_boot_control_reg_t;
 
   typedef struct packed {
-    logic [31:0] q;
+    logic        q;
   } spatz_cluster_peripheral_reg2hw_cluster_eoc_exit_reg_t;
 
   typedef struct packed {
@@ -191,16 +191,16 @@ package spatz_cluster_peripheral_reg_pkg;
 
   // Register -> HW type
   typedef struct packed {
-    spatz_cluster_peripheral_reg2hw_perf_counter_enable_mreg_t [1:0] perf_counter_enable; // [357:296]
-    spatz_cluster_peripheral_reg2hw_hart_select_mreg_t [1:0] hart_select; // [295:276]
-    spatz_cluster_peripheral_reg2hw_perf_counter_mreg_t [1:0] perf_counter; // [275:178]
-    spatz_cluster_peripheral_reg2hw_cl_clint_set_reg_t cl_clint_set; // [177:145]
-    spatz_cluster_peripheral_reg2hw_cl_clint_clear_reg_t cl_clint_clear; // [144:112]
-    spatz_cluster_peripheral_reg2hw_hw_barrier_reg_t hw_barrier; // [111:80]
-    spatz_cluster_peripheral_reg2hw_icache_prefetch_enable_reg_t icache_prefetch_enable; // [79:79]
-    spatz_cluster_peripheral_reg2hw_spatz_status_reg_t spatz_status; // [78:78]
-    spatz_cluster_peripheral_reg2hw_cluster_boot_control_reg_t cluster_boot_control; // [77:46]
-    spatz_cluster_peripheral_reg2hw_cluster_eoc_exit_reg_t cluster_eoc_exit; // [45:14]
+    spatz_cluster_peripheral_reg2hw_perf_counter_enable_mreg_t [1:0] perf_counter_enable; // [326:265]
+    spatz_cluster_peripheral_reg2hw_hart_select_mreg_t [1:0] hart_select; // [264:245]
+    spatz_cluster_peripheral_reg2hw_perf_counter_mreg_t [1:0] perf_counter; // [244:147]
+    spatz_cluster_peripheral_reg2hw_cl_clint_set_reg_t cl_clint_set; // [146:114]
+    spatz_cluster_peripheral_reg2hw_cl_clint_clear_reg_t cl_clint_clear; // [113:81]
+    spatz_cluster_peripheral_reg2hw_hw_barrier_reg_t hw_barrier; // [80:49]
+    spatz_cluster_peripheral_reg2hw_icache_prefetch_enable_reg_t icache_prefetch_enable; // [48:48]
+    spatz_cluster_peripheral_reg2hw_spatz_status_reg_t spatz_status; // [47:47]
+    spatz_cluster_peripheral_reg2hw_cluster_boot_control_reg_t cluster_boot_control; // [46:15]
+    spatz_cluster_peripheral_reg2hw_cluster_eoc_exit_reg_t cluster_eoc_exit; // [14:14]
     spatz_cluster_peripheral_reg2hw_cfg_l1d_spm_reg_t cfg_l1d_spm; // [13:4]
     spatz_cluster_peripheral_reg2hw_cfg_l1d_insn_reg_t cfg_l1d_insn; // [3:2]
     spatz_cluster_peripheral_reg2hw_l1d_spm_commit_reg_t l1d_spm_commit; // [1:1]
@@ -281,7 +281,7 @@ package spatz_cluster_peripheral_reg_pkg;
     4'b 0001, // index[ 9] SPATZ_CLUSTER_PERIPHERAL_ICACHE_PREFETCH_ENABLE
     4'b 0001, // index[10] SPATZ_CLUSTER_PERIPHERAL_SPATZ_STATUS
     4'b 1111, // index[11] SPATZ_CLUSTER_PERIPHERAL_CLUSTER_BOOT_CONTROL
-    4'b 1111, // index[12] SPATZ_CLUSTER_PERIPHERAL_CLUSTER_EOC_EXIT
+    4'b 0001, // index[12] SPATZ_CLUSTER_PERIPHERAL_CLUSTER_EOC_EXIT
     4'b 0011, // index[13] SPATZ_CLUSTER_PERIPHERAL_CFG_L1D_SPM
     4'b 0001, // index[14] SPATZ_CLUSTER_PERIPHERAL_CFG_L1D_INSN
     4'b 0001, // index[15] SPATZ_CLUSTER_PERIPHERAL_L1D_SPM_COMMIT

hw/system/spatz_cluster/src/spatz_cluster_peripheral/spatz_cluster_peripheral_reg_top.sv

@@ -281,8 +281,8 @@ module spatz_cluster_peripheral_reg_top #(
   logic [31:0] cluster_boot_control_qs;
   logic [31:0] cluster_boot_control_wd;
   logic cluster_boot_control_we;
-  logic [31:0] cluster_eoc_exit_qs;
-  logic [31:0] cluster_eoc_exit_wd;
+  logic cluster_eoc_exit_qs;
+  logic cluster_eoc_exit_wd;
   logic cluster_eoc_exit_we;
   logic [9:0] cfg_l1d_spm_qs;
   logic [9:0] cfg_l1d_spm_wd;
@@ -2140,9 +2140,9 @@ module spatz_cluster_peripheral_reg_top #(
   // R[cluster_eoc_exit]: V(False)
 
   prim_subreg #(
-    .DW      (32),
+    .DW      (1),
     .SWACCESS("RW"),
-    .RESVAL  (32'h0)
+    .RESVAL  (1'h0)
   ) u_cluster_eoc_exit (
     .clk_i   (clk_i    ),
     .rst_ni  (rst_ni  ),
@@ -2556,7 +2556,7 @@ module spatz_cluster_peripheral_reg_top #(
   assign cluster_boot_control_wd = reg_wdata[31:0];
 
   assign cluster_eoc_exit_we = addr_hit[12] & reg_we & !reg_error;
-  assign cluster_eoc_exit_wd = reg_wdata[31:0];
+  assign cluster_eoc_exit_wd = reg_wdata[0];
 
   assign cfg_l1d_spm_we = addr_hit[13] & reg_we & !reg_error;
   assign cfg_l1d_spm_wd = reg_wdata[9:0];
@@ -2685,7 +2685,7 @@ module spatz_cluster_peripheral_reg_top #(
       end
 
       addr_hit[12]: begin
-        reg_rdata_next[31:0] = cluster_eoc_exit_qs;
+        reg_rdata_next[0] = cluster_eoc_exit_qs;
       end
 
       addr_hit[13]: begin

sw/snRuntime/include/spatz_cluster_peripheral.h

@@ -194,12 +194,7 @@ extern "C" {
 
 // End of computation and exit status register
 #define SPATZ_CLUSTER_PERIPHERAL_CLUSTER_EOC_EXIT_REG_OFFSET 0x60
-#define SPATZ_CLUSTER_PERIPHERAL_CLUSTER_EOC_EXIT_EOC_EXIT_MASK 0xffffffff
-#define SPATZ_CLUSTER_PERIPHERAL_CLUSTER_EOC_EXIT_EOC_EXIT_OFFSET 0
-#define SPATZ_CLUSTER_PERIPHERAL_CLUSTER_EOC_EXIT_EOC_EXIT_FIELD               \
-  ((bitfield_field32_t){                                                       \
-      .mask = SPATZ_CLUSTER_PERIPHERAL_CLUSTER_EOC_EXIT_EOC_EXIT_MASK,         \
-      .index = SPATZ_CLUSTER_PERIPHERAL_CLUSTER_EOC_EXIT_EOC_EXIT_OFFSET})
+#define SPATZ_CLUSTER_PERIPHERAL_CLUSTER_EOC_EXIT_EOC_EXIT_BIT 0
 
 // Controls the configurations of L1 DCache SPM size.
 #define SPATZ_CLUSTER_PERIPHERAL_CFG_L1D_SPM_REG_OFFSET 0x68