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Merge branch 'ez/flamingo-v2' into flamingo/spatzennest
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Added EOC register to indicate end of compute for Spatz
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Navaneeth-KunhiPurayil committed Nov 22, 2024
2 parents 64140ef + 4ad23cf commit 38b5c55
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Showing 4 changed files with 96 additions and 37 deletions.
2 changes: 1 addition & 1 deletion hw/system/spatz_cluster/Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -9,7 +9,7 @@ ROOT := ${SPATZ_DIR}
SPATZ_CLUSTER_DIR := ${SPATZ_DIR}/hw/system/spatz_cluster
MKFILE_PATH := $(abspath $(lastword $(MAKEFILE_LIST)))
MKFILE_DIR := $(dir $(MKFILE_PATH))
CACHE_PATH := $(shell bender path insitu-cache)
CACHE_PATH := $(shell $(BENDER) path insitu-cache)

# Configuration file
CFG ?= flamingo
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Original file line number Diff line number Diff line change
Expand Up @@ -427,6 +427,18 @@
desc: "Post-bootstrapping entry point."
}]
},
{
name: "CLUSTER_EOC_EXIT",
desc: '''End of computation and exit status register'''
swaccess: "rw",
hwaccess: "hro",
resval: "0",
fields: [{
bits: "31:0",
name: "EOC_EXIT",
desc: "Indicates the end of computation and exit status."
}]
},
{
name: "CFG_L1D_SPM",
desc: '''Controls the configurations of L1 DCache SPM size.'''
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Original file line number Diff line number Diff line change
Expand Up @@ -147,6 +147,10 @@ package spatz_cluster_peripheral_reg_pkg;
logic [31:0] q;
} spatz_cluster_peripheral_reg2hw_cluster_boot_control_reg_t;

typedef struct packed {
logic [31:0] q;
} spatz_cluster_peripheral_reg2hw_cluster_eoc_exit_reg_t;

typedef struct packed {
logic [9:0] q;
} spatz_cluster_peripheral_reg2hw_cfg_l1d_spm_reg_t;
Expand Down Expand Up @@ -187,15 +191,16 @@ package spatz_cluster_peripheral_reg_pkg;

// Register -> HW type
typedef struct packed {
spatz_cluster_peripheral_reg2hw_perf_counter_enable_mreg_t [1:0] perf_counter_enable; // [325:264]
spatz_cluster_peripheral_reg2hw_hart_select_mreg_t [1:0] hart_select; // [263:244]
spatz_cluster_peripheral_reg2hw_perf_counter_mreg_t [1:0] perf_counter; // [243:146]
spatz_cluster_peripheral_reg2hw_cl_clint_set_reg_t cl_clint_set; // [145:113]
spatz_cluster_peripheral_reg2hw_cl_clint_clear_reg_t cl_clint_clear; // [112:80]
spatz_cluster_peripheral_reg2hw_hw_barrier_reg_t hw_barrier; // [79:48]
spatz_cluster_peripheral_reg2hw_icache_prefetch_enable_reg_t icache_prefetch_enable; // [47:47]
spatz_cluster_peripheral_reg2hw_spatz_status_reg_t spatz_status; // [46:46]
spatz_cluster_peripheral_reg2hw_cluster_boot_control_reg_t cluster_boot_control; // [45:14]
spatz_cluster_peripheral_reg2hw_perf_counter_enable_mreg_t [1:0] perf_counter_enable; // [357:296]
spatz_cluster_peripheral_reg2hw_hart_select_mreg_t [1:0] hart_select; // [295:276]
spatz_cluster_peripheral_reg2hw_perf_counter_mreg_t [1:0] perf_counter; // [275:178]
spatz_cluster_peripheral_reg2hw_cl_clint_set_reg_t cl_clint_set; // [177:145]
spatz_cluster_peripheral_reg2hw_cl_clint_clear_reg_t cl_clint_clear; // [144:112]
spatz_cluster_peripheral_reg2hw_hw_barrier_reg_t hw_barrier; // [111:80]
spatz_cluster_peripheral_reg2hw_icache_prefetch_enable_reg_t icache_prefetch_enable; // [79:79]
spatz_cluster_peripheral_reg2hw_spatz_status_reg_t spatz_status; // [78:78]
spatz_cluster_peripheral_reg2hw_cluster_boot_control_reg_t cluster_boot_control; // [77:46]
spatz_cluster_peripheral_reg2hw_cluster_eoc_exit_reg_t cluster_eoc_exit; // [45:14]
spatz_cluster_peripheral_reg2hw_cfg_l1d_spm_reg_t cfg_l1d_spm; // [13:4]
spatz_cluster_peripheral_reg2hw_cfg_l1d_insn_reg_t cfg_l1d_insn; // [3:2]
spatz_cluster_peripheral_reg2hw_l1d_spm_commit_reg_t l1d_spm_commit; // [1:1]
Expand Down Expand Up @@ -224,11 +229,12 @@ package spatz_cluster_peripheral_reg_pkg;
parameter logic [BlockAw-1:0] SPATZ_CLUSTER_PERIPHERAL_ICACHE_PREFETCH_ENABLE_OFFSET = 8'h 48;
parameter logic [BlockAw-1:0] SPATZ_CLUSTER_PERIPHERAL_SPATZ_STATUS_OFFSET = 8'h 50;
parameter logic [BlockAw-1:0] SPATZ_CLUSTER_PERIPHERAL_CLUSTER_BOOT_CONTROL_OFFSET = 8'h 58;
parameter logic [BlockAw-1:0] SPATZ_CLUSTER_PERIPHERAL_CFG_L1D_SPM_OFFSET = 8'h 60;
parameter logic [BlockAw-1:0] SPATZ_CLUSTER_PERIPHERAL_CFG_L1D_INSN_OFFSET = 8'h 68;
parameter logic [BlockAw-1:0] SPATZ_CLUSTER_PERIPHERAL_L1D_SPM_COMMIT_OFFSET = 8'h 70;
parameter logic [BlockAw-1:0] SPATZ_CLUSTER_PERIPHERAL_L1D_INSN_COMMIT_OFFSET = 8'h 78;
parameter logic [BlockAw-1:0] SPATZ_CLUSTER_PERIPHERAL_L1D_FLUSH_STATUS_OFFSET = 8'h 80;
parameter logic [BlockAw-1:0] SPATZ_CLUSTER_PERIPHERAL_CLUSTER_EOC_EXIT_OFFSET = 8'h 60;
parameter logic [BlockAw-1:0] SPATZ_CLUSTER_PERIPHERAL_CFG_L1D_SPM_OFFSET = 8'h 68;
parameter logic [BlockAw-1:0] SPATZ_CLUSTER_PERIPHERAL_CFG_L1D_INSN_OFFSET = 8'h 70;
parameter logic [BlockAw-1:0] SPATZ_CLUSTER_PERIPHERAL_L1D_SPM_COMMIT_OFFSET = 8'h 78;
parameter logic [BlockAw-1:0] SPATZ_CLUSTER_PERIPHERAL_L1D_INSN_COMMIT_OFFSET = 8'h 80;
parameter logic [BlockAw-1:0] SPATZ_CLUSTER_PERIPHERAL_L1D_FLUSH_STATUS_OFFSET = 8'h 88;

// Reset values for hwext registers and their fields
parameter logic [47:0] SPATZ_CLUSTER_PERIPHERAL_PERF_COUNTER_0_RESVAL = 48'h 0;
Expand All @@ -253,6 +259,7 @@ package spatz_cluster_peripheral_reg_pkg;
SPATZ_CLUSTER_PERIPHERAL_ICACHE_PREFETCH_ENABLE,
SPATZ_CLUSTER_PERIPHERAL_SPATZ_STATUS,
SPATZ_CLUSTER_PERIPHERAL_CLUSTER_BOOT_CONTROL,
SPATZ_CLUSTER_PERIPHERAL_CLUSTER_EOC_EXIT,
SPATZ_CLUSTER_PERIPHERAL_CFG_L1D_SPM,
SPATZ_CLUSTER_PERIPHERAL_CFG_L1D_INSN,
SPATZ_CLUSTER_PERIPHERAL_L1D_SPM_COMMIT,
Expand All @@ -261,7 +268,7 @@ package spatz_cluster_peripheral_reg_pkg;
} spatz_cluster_peripheral_id_e;

// Register width information to check illegal writes
parameter logic [3:0] SPATZ_CLUSTER_PERIPHERAL_PERMIT [17] = '{
parameter logic [3:0] SPATZ_CLUSTER_PERIPHERAL_PERMIT [18] = '{
4'b 1111, // index[ 0] SPATZ_CLUSTER_PERIPHERAL_PERF_COUNTER_ENABLE_0
4'b 1111, // index[ 1] SPATZ_CLUSTER_PERIPHERAL_PERF_COUNTER_ENABLE_1
4'b 0011, // index[ 2] SPATZ_CLUSTER_PERIPHERAL_HART_SELECT_0
Expand All @@ -274,11 +281,12 @@ package spatz_cluster_peripheral_reg_pkg;
4'b 0001, // index[ 9] SPATZ_CLUSTER_PERIPHERAL_ICACHE_PREFETCH_ENABLE
4'b 0001, // index[10] SPATZ_CLUSTER_PERIPHERAL_SPATZ_STATUS
4'b 1111, // index[11] SPATZ_CLUSTER_PERIPHERAL_CLUSTER_BOOT_CONTROL
4'b 0011, // index[12] SPATZ_CLUSTER_PERIPHERAL_CFG_L1D_SPM
4'b 0001, // index[13] SPATZ_CLUSTER_PERIPHERAL_CFG_L1D_INSN
4'b 0001, // index[14] SPATZ_CLUSTER_PERIPHERAL_L1D_SPM_COMMIT
4'b 0001, // index[15] SPATZ_CLUSTER_PERIPHERAL_L1D_INSN_COMMIT
4'b 0001 // index[16] SPATZ_CLUSTER_PERIPHERAL_L1D_FLUSH_STATUS
4'b 1111, // index[12] SPATZ_CLUSTER_PERIPHERAL_CLUSTER_EOC_EXIT
4'b 0011, // index[13] SPATZ_CLUSTER_PERIPHERAL_CFG_L1D_SPM
4'b 0001, // index[14] SPATZ_CLUSTER_PERIPHERAL_CFG_L1D_INSN
4'b 0001, // index[15] SPATZ_CLUSTER_PERIPHERAL_L1D_SPM_COMMIT
4'b 0001, // index[16] SPATZ_CLUSTER_PERIPHERAL_L1D_INSN_COMMIT
4'b 0001 // index[17] SPATZ_CLUSTER_PERIPHERAL_L1D_FLUSH_STATUS
};

endpackage
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Original file line number Diff line number Diff line change
Expand Up @@ -281,6 +281,9 @@ module spatz_cluster_peripheral_reg_top #(
logic [31:0] cluster_boot_control_qs;
logic [31:0] cluster_boot_control_wd;
logic cluster_boot_control_we;
logic [31:0] cluster_eoc_exit_qs;
logic [31:0] cluster_eoc_exit_wd;
logic cluster_eoc_exit_we;
logic [9:0] cfg_l1d_spm_qs;
logic [9:0] cfg_l1d_spm_wd;
logic cfg_l1d_spm_we;
Expand Down Expand Up @@ -2134,6 +2137,33 @@ module spatz_cluster_peripheral_reg_top #(
);


// R[cluster_eoc_exit]: V(False)

prim_subreg #(
.DW (32),
.SWACCESS("RW"),
.RESVAL (32'h0)
) u_cluster_eoc_exit (
.clk_i (clk_i ),
.rst_ni (rst_ni ),

// from register interface
.we (cluster_eoc_exit_we),
.wd (cluster_eoc_exit_wd),

// from internal hardware
.de (1'b0),
.d ('0 ),

// to internal hardware
.qe (),
.q (reg2hw.cluster_eoc_exit.q ),

// to register interface (read)
.qs (cluster_eoc_exit_qs)
);


// R[cfg_l1d_spm]: V(False)

prim_subreg #(
Expand Down Expand Up @@ -2260,7 +2290,7 @@ module spatz_cluster_peripheral_reg_top #(



logic [16:0] addr_hit;
logic [17:0] addr_hit;
always_comb begin
addr_hit = '0;
addr_hit[ 0] = (reg_addr == SPATZ_CLUSTER_PERIPHERAL_PERF_COUNTER_ENABLE_0_OFFSET);
Expand All @@ -2275,11 +2305,12 @@ module spatz_cluster_peripheral_reg_top #(
addr_hit[ 9] = (reg_addr == SPATZ_CLUSTER_PERIPHERAL_ICACHE_PREFETCH_ENABLE_OFFSET);
addr_hit[10] = (reg_addr == SPATZ_CLUSTER_PERIPHERAL_SPATZ_STATUS_OFFSET);
addr_hit[11] = (reg_addr == SPATZ_CLUSTER_PERIPHERAL_CLUSTER_BOOT_CONTROL_OFFSET);
addr_hit[12] = (reg_addr == SPATZ_CLUSTER_PERIPHERAL_CFG_L1D_SPM_OFFSET);
addr_hit[13] = (reg_addr == SPATZ_CLUSTER_PERIPHERAL_CFG_L1D_INSN_OFFSET);
addr_hit[14] = (reg_addr == SPATZ_CLUSTER_PERIPHERAL_L1D_SPM_COMMIT_OFFSET);
addr_hit[15] = (reg_addr == SPATZ_CLUSTER_PERIPHERAL_L1D_INSN_COMMIT_OFFSET);
addr_hit[16] = (reg_addr == SPATZ_CLUSTER_PERIPHERAL_L1D_FLUSH_STATUS_OFFSET);
addr_hit[12] = (reg_addr == SPATZ_CLUSTER_PERIPHERAL_CLUSTER_EOC_EXIT_OFFSET);
addr_hit[13] = (reg_addr == SPATZ_CLUSTER_PERIPHERAL_CFG_L1D_SPM_OFFSET);
addr_hit[14] = (reg_addr == SPATZ_CLUSTER_PERIPHERAL_CFG_L1D_INSN_OFFSET);
addr_hit[15] = (reg_addr == SPATZ_CLUSTER_PERIPHERAL_L1D_SPM_COMMIT_OFFSET);
addr_hit[16] = (reg_addr == SPATZ_CLUSTER_PERIPHERAL_L1D_INSN_COMMIT_OFFSET);
addr_hit[17] = (reg_addr == SPATZ_CLUSTER_PERIPHERAL_L1D_FLUSH_STATUS_OFFSET);
end

assign addrmiss = (reg_re || reg_we) ? ~|addr_hit : 1'b0 ;
Expand All @@ -2303,7 +2334,8 @@ module spatz_cluster_peripheral_reg_top #(
(addr_hit[13] & (|(SPATZ_CLUSTER_PERIPHERAL_PERMIT[13] & ~reg_be))) |
(addr_hit[14] & (|(SPATZ_CLUSTER_PERIPHERAL_PERMIT[14] & ~reg_be))) |
(addr_hit[15] & (|(SPATZ_CLUSTER_PERIPHERAL_PERMIT[15] & ~reg_be))) |
(addr_hit[16] & (|(SPATZ_CLUSTER_PERIPHERAL_PERMIT[16] & ~reg_be)))));
(addr_hit[16] & (|(SPATZ_CLUSTER_PERIPHERAL_PERMIT[16] & ~reg_be))) |
(addr_hit[17] & (|(SPATZ_CLUSTER_PERIPHERAL_PERMIT[17] & ~reg_be)))));
end

assign perf_counter_enable_0_cycle_0_we = addr_hit[0] & reg_we & !reg_error;
Expand Down Expand Up @@ -2523,19 +2555,22 @@ module spatz_cluster_peripheral_reg_top #(
assign cluster_boot_control_we = addr_hit[11] & reg_we & !reg_error;
assign cluster_boot_control_wd = reg_wdata[31:0];

assign cfg_l1d_spm_we = addr_hit[12] & reg_we & !reg_error;
assign cluster_eoc_exit_we = addr_hit[12] & reg_we & !reg_error;
assign cluster_eoc_exit_wd = reg_wdata[31:0];

assign cfg_l1d_spm_we = addr_hit[13] & reg_we & !reg_error;
assign cfg_l1d_spm_wd = reg_wdata[9:0];

assign cfg_l1d_insn_we = addr_hit[13] & reg_we & !reg_error;
assign cfg_l1d_insn_we = addr_hit[14] & reg_we & !reg_error;
assign cfg_l1d_insn_wd = reg_wdata[1:0];

assign l1d_spm_commit_we = addr_hit[14] & reg_we & !reg_error;
assign l1d_spm_commit_we = addr_hit[15] & reg_we & !reg_error;
assign l1d_spm_commit_wd = reg_wdata[0];

assign l1d_insn_commit_we = addr_hit[15] & reg_we & !reg_error;
assign l1d_insn_commit_we = addr_hit[16] & reg_we & !reg_error;
assign l1d_insn_commit_wd = reg_wdata[0];

assign l1d_flush_status_re = addr_hit[16] & reg_re & !reg_error;
assign l1d_flush_status_re = addr_hit[17] & reg_re & !reg_error;

// Read data return
always_comb begin
Expand Down Expand Up @@ -2650,22 +2685,26 @@ module spatz_cluster_peripheral_reg_top #(
end

addr_hit[12]: begin
reg_rdata_next[9:0] = cfg_l1d_spm_qs;
reg_rdata_next[31:0] = cluster_eoc_exit_qs;
end

addr_hit[13]: begin
reg_rdata_next[1:0] = cfg_l1d_insn_qs;
reg_rdata_next[9:0] = cfg_l1d_spm_qs;
end

addr_hit[14]: begin
reg_rdata_next[0] = l1d_spm_commit_qs;
reg_rdata_next[1:0] = cfg_l1d_insn_qs;
end

addr_hit[15]: begin
reg_rdata_next[0] = l1d_insn_commit_qs;
reg_rdata_next[0] = l1d_spm_commit_qs;
end

addr_hit[16]: begin
reg_rdata_next[0] = l1d_insn_commit_qs;
end

addr_hit[17]: begin
reg_rdata_next[0] = l1d_flush_status_qs;
end

Expand Down

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