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[hw/ip/spatz] clean code to use the define BUF_FPU to use the buffer
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@Navaneeth-KunhiPurayil
Navaneeth-KunhiPurayil committed Dec 20, 2024
1 parent bfbff14 commit 1684ceb
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Showing 6 changed files with 118 additions and 39 deletions.
51 changes: 30 additions & 21 deletions hw/ip/spatz/src/spatz.sv
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Original file line number Diff line number Diff line change
Expand Up @@ -288,26 +288,6 @@ module spatz import spatz_pkg::*; import rvv_pkg::*; import fpnew_pkg::*; #(
.sb_enable_o ({vrf_we, vrf_re} )
);

always_comb begin
sb_we_buf = sb_we;
vrf_wdata_buf = vrf_wdata;
vrf_waddr_buf = vrf_waddr;
vrf_wbe_buf = vrf_wbe;
sb_buf_id = sb_id;
vfu_rsp_buf = vfu_rsp;
vfu_rsp_buf_valid = vfu_rsp_valid;
if (vrf_buf_valid) begin
sb_we_buf [VFU_VD_WD] = 1'b1;
vrf_wdata_buf[VFU_VD_WD] = vrf_buf_data.wdata;
vrf_waddr_buf[VFU_VD_WD] = vrf_buf_data.waddr;
vrf_wbe_buf [VFU_VD_WD] = vrf_buf_data.wbe;
sb_buf_id [SB_VFU_VD_WD] = vrf_buf_data.wid;
vfu_rsp_buf = vrf_buf_data.rsp;
vfu_rsp_buf_valid = vrf_buf_data.rsp_valid;
end
end


/////////
// VFU //
/////////
Expand All @@ -331,7 +311,11 @@ module spatz import spatz_pkg::*; import rvv_pkg::*; import fpnew_pkg::*; #(
.vrf_wdata_o (vrf_wdata[VFU_VD_WD] ),
.vrf_we_o (sb_we[VFU_VD_WD] ),
.vrf_wbe_o (vrf_wbe[VFU_VD_WD] ),
.vrf_wvalid_i (vrf_vfu_wvalid ),
`ifdef BUF_FPU
.vrf_wvalid_i (vrf_vfu_wvalid ),
`else
.vrf_wvalid_i (vrf_wvalid[VFU_VD_WD] ),
`endif
.vrf_raddr_o (vrf_raddr[VFU_VD_RD:VFU_VS2_RD] ),
.vrf_re_o (sb_re[VFU_VD_RD:VFU_VS2_RD] ),
.vrf_rdata_i (vrf_rdata[VFU_VD_RD:VFU_VS2_RD] ),
Expand All @@ -341,6 +325,7 @@ module spatz import spatz_pkg::*; import rvv_pkg::*; import fpnew_pkg::*; #(
.fpu_status_o (fpu_status_o )
);

`ifdef BUF_FPU
// To add one cycle latency of buffering to ensure that conflicts that arise
// with the VLSU interfaces can be hidden
assign vrf_buf_en = sb_we[VFU_VD_WD] && (!vrf_wvalid[VFU_VD_WD] || (vrf_wvalid[VFU_VD_WD] && vrf_buf_valid));
Expand All @@ -359,6 +344,30 @@ module spatz import spatz_pkg::*; import rvv_pkg::*; import fpnew_pkg::*; #(
.data_o (vrf_buf_data )
);
assign vrf_vfu_wvalid = sb_we[VFU_VD_WD] && vrf_buf_ready;
`endif

always_comb begin
// Default assignments
sb_we_buf = sb_we;
vrf_wdata_buf = vrf_wdata;
vrf_waddr_buf = vrf_waddr;
vrf_wbe_buf = vrf_wbe;
sb_buf_id = sb_id;
vfu_rsp_buf = vfu_rsp;
vfu_rsp_buf_valid = vfu_rsp_valid;
// If buffer is used and has valid data, use the buffered data
`ifdef BUF_FPU
if (vrf_buf_valid) begin
sb_we_buf [VFU_VD_WD] = 1'b1;
vrf_wdata_buf[VFU_VD_WD] = vrf_buf_data.wdata;
vrf_waddr_buf[VFU_VD_WD] = vrf_buf_data.waddr;
vrf_wbe_buf [VFU_VD_WD] = vrf_buf_data.wbe;
sb_buf_id [SB_VFU_VD_WD] = vrf_buf_data.wid;
vfu_rsp_buf = vrf_buf_data.rsp;
vfu_rsp_buf_valid = vrf_buf_data.rsp_valid;
end
`endif
end

//////////
// VLSU //
Expand Down
25 changes: 7 additions & 18 deletions hw/ip/spatz/src/spatz_vrf.sv
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Original file line number Diff line number Diff line change
Expand Up @@ -68,10 +68,6 @@ module spatz_vrf
vregfile_addr_t [NrVRFBanks-1:0][NrReadPortsPerBank-1:0] raddr;
vrf_data_t [NrVRFBanks-1:0][NrReadPortsPerBank-1:0] rdata;

// Priority assignment
logic prioritize_vlsu_d, prioritize_vlsu_q;
`FF(prioritize_vlsu_q, prioritize_vlsu_d, '0)

///////////////////
// Write Mapping //
///////////////////
Expand All @@ -91,27 +87,19 @@ module spatz_vrf
we = '0;
wbe = '0;
wvalid_o = '0;
prioritize_vlsu_d = prioritize_vlsu_q;

// For each bank, we have a priority based access scheme. First priority always has the VFU,
// second priority has the LSU, and third priority has the slide unit.
for (int unsigned bank = 0; bank < NrVRFBanks; bank++) begin
// Bank write port 0 - Priority: vd (0) -> lsu (round-robin) <-> sld (round-robin)

automatic logic conflict_vlsu_int = write_request[bank][VFU_VD_WD] & (write_request[bank][VLSU_VD_WD0] | write_request[bank][VLSU_VD_WD1]);
automatic logic prioritize_vlsu = 1'b0;
if (conflict_vlsu_int) begin
prioritize_vlsu_d = 1'b1;
end

// At the moment it is asif the VLSU ports have higher priority than the
// FPU.
`ifdef BUF_FPU

Check warning on line 95 in hw/ip/spatz/src/spatz_vrf.sv

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[verible-verilog-lint] hw/ip/spatz/src/spatz_vrf.sv#L95 

Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
Raw output 
message:"Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]"  location:{path:"hw/ip/spatz/src/spatz_vrf.sv"  range:{start:{line:95  column:15}}}  severity:WARNING  source:{name:"verible-verilog-lint"  url:"https://github.com/chipsalliance/verible"}  suggestions:{range:{start:{line:95  column:15}  end:{line:96}}  text:"`ifdef BUF_FPU\n"}
// At the moment it is as if the VLSU ports have higher priority than the FPU.
if (write_request[bank][VLSU_VD_WD0]) begin
waddr[bank] = f_vreg(waddr_i[VLSU_VD_WD0]);
wdata[bank] = wdata_i[VLSU_VD_WD0];
we[bank] = 1'b1;
wbe[bank] = wbe_i[VLSU_VD_WD0];
wvalid_o[VLSU_VD_WD0] = 1'b1;
prioritize_vlsu_d = 1'b0;
end else if (write_request[bank][VLSU_VD_WD1]) begin
waddr[bank] = f_vreg(waddr_i[VLSU_VD_WD1]);
wdata[bank] = wdata_i[VLSU_VD_WD1];
Expand All @@ -131,8 +119,8 @@ module spatz_vrf
wbe[bank] = wbe_i[VSLDU_VD_WD];
wvalid_o[VSLDU_VD_WD] = 1'b1;
end

/*if (write_request[bank][VFU_VD_WD]) begin
`else
if (write_request[bank][VFU_VD_WD]) begin
waddr[bank] = f_vreg(waddr_i[VFU_VD_WD]);
wdata[bank] = wdata_i[VFU_VD_WD];
we[bank] = 1'b1;
Expand All @@ -156,7 +144,8 @@ module spatz_vrf
we[bank] = 1'b1;
wbe[bank] = wbe_i[VSLDU_VD_WD];
wvalid_o[VSLDU_VD_WD] = 1'b1;
end*/
end
`endif
end
end

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3 changes: 3 additions & 0 deletions sw/spatzBenchmarks/CMakeLists.txt
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Original file line number Diff line number Diff line change
Expand Up @@ -103,7 +103,10 @@ add_spatz_test_threeParam(sdotp-bp-fmatmul sdotp-bp-fmatmul/main.c 128 256 128)

add_spatz_test_oneParam(dp-faxpy dp-faxpy/main.c 128)
add_spatz_test_oneParam(dp-faxpy dp-faxpy/main.c 256)
add_spatz_test_oneParam(dp-faxpy dp-faxpy/main.c 512)
add_spatz_test_oneParam(dp-faxpy dp-faxpy/main.c 1024)
add_spatz_test_oneParam(dp-faxpy dp-faxpy/main.c 2048)
add_spatz_test_oneParam(dp-faxpy dp-faxpy/main.c 4096)

add_spatz_test_oneParam(dp-fdotp dp-fdotp/main.c 128)
add_spatz_test_oneParam(dp-fdotp dp-fdotp/main.c 256)
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26 changes: 26 additions & 0 deletions sw/spatzBenchmarks/dp-faxpy/data/data_2048.h
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26 changes: 26 additions & 0 deletions sw/spatzBenchmarks/dp-faxpy/data/data_4096.h
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26 changes: 26 additions & 0 deletions sw/spatzBenchmarks/dp-faxpy/data/data_512.h
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