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[fix] Realign addresses to 64-bit #145
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I'll double check otherwise looks good. Could you also please update the documentation (it describes the debug module addresses). |
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lgtm
niwis
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This fixes two errors in the debug module addresses passed to CVA6: 1. `HaltAddress` and `ExceptionAddress` are assumed to be relative to `DmBaseAddress`, see https://github.com/pulp-platform/cva6/blob/99ae53bde1a94b90c1d9bbbe7fe272a9336200a6/core/frontend/frontend.sv#L380 and https://github.com/pulp-platform/cva6/blob/99ae53bde1a94b90c1d9bbbe7fe272a9336200a6/core/csr_regfile.sv#L2295. Coincidentally, this currently does not cause any issues since `AmDbg = '0`, 2. `ExceptionAddress` was changed from `0x808` to `0x810` in pulp-platform/riscv-dbg#145, which is included in the debug module version used in Cheshire. This means that exceptions in debug mode currently cause CVA6 to jump to `resume` and return from debug mode instead of handling the exception, which breaks several openocd commands that use exceptions to discover CSR availabilities. Signed-off-by: Nils Wistoff <[email protected]>
niwis
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Dec 5, 2024
This fixes two errors in the debug module addresses passed to CVA6: 1. `HaltAddress` and `ExceptionAddress` are assumed to be relative to `DmBaseAddress`, see https://github.com/pulp-platform/cva6/blob/99ae53bde1a94b90c1d9bbbe7fe272a9336200a6/core/frontend/frontend.sv#L380 and https://github.com/pulp-platform/cva6/blob/99ae53bde1a94b90c1d9bbbe7fe272a9336200a6/core/csr_regfile.sv#L2295. Coincidentally, this currently does not cause any issues since `AmDbg = '0`, 2. `ExceptionAddress` was changed from `0x808` to `0x810` in pulp-platform/riscv-dbg#145, which is included in the debug module version used in Cheshire. This means that exceptions in debug mode currently cause CVA6 to jump to `resume` and return from debug mode instead of handling the exception, which breaks several openocd commands that use exceptions to discover CSR availabilities. Signed-off-by: Nils Wistoff <[email protected]>
paulsc96
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that referenced
this pull request
Dec 5, 2024
This fixes two errors in the debug module addresses passed to CVA6: 1. `HaltAddress` and `ExceptionAddress` are assumed to be relative to `DmBaseAddress`, see https://github.com/pulp-platform/cva6/blob/99ae53bde1a94b90c1d9bbbe7fe272a9336200a6/core/frontend/frontend.sv#L380 and https://github.com/pulp-platform/cva6/blob/99ae53bde1a94b90c1d9bbbe7fe272a9336200a6/core/csr_regfile.sv#L2295. Coincidentally, this currently does not cause any issues since `AmDbg = '0`, 2. `ExceptionAddress` was changed from `0x808` to `0x810` in pulp-platform/riscv-dbg#145, which is included in the debug module version used in Cheshire. This means that exceptions in debug mode currently cause CVA6 to jump to `resume` and return from debug mode instead of handling the exception, which breaks several openocd commands that use exceptions to discover CSR availabilities. Signed-off-by: Nils Wistoff <[email protected]>
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The read/write logic in dm_mem.sv only looks at the request address and does not take the byte strobes into account which causes problems when trying to write the Halted, Going, Resuming and Exception locations from a bus that is larger than 32 bit as that would require misaligned requests.
This PR addresses this by realigning the relevant addresses to 64 bits, which makes the DM work for 32 and 64-bit harts.