Update source manifests and README

Bender.yml

@@ -8,6 +8,7 @@ package:
     - "Manuel Eggimann <[email protected]>"
     - "Stefan Mach <[email protected]>"
     - "Wolfgang Roenninger <[email protected]>"
+    - "Thomas Benz <[email protected]>"
 
 dependencies:
   common_verification: { git: "https://github.com/pulp-platform/common_verification.git", version: 0.2.0 }
@@ -20,89 +21,93 @@ sources:
   # Source files grouped in levels. Files in level 0 have no dependencies on files in this package.
   # Files in level 1 only depend on files in level 0, files in level 2 on files in levels 1 and 0,
   # etc. Files within a level are ordered alphabetically.
+
   # Level 0
   - src/binary_to_gray.sv
+
   - target: not(all(xilinx,vivado_ipx))
     files:
-    - src/cb_filter_pkg.sv
-  - src/cc_onehot.sv
-  - src/cf_math_pkg.sv
-  - src/clk_int_div.sv
-  - src/delta_counter.sv
-  - src/ecc_pkg.sv
-  - src/edge_propagator_tx.sv
-  - src/exp_backoff.sv
-  - src/fifo_v3.sv
-  - src/gray_to_binary.sv
-  - src/isochronous_4phase_handshake.sv
-  - src/isochronous_spill_register.sv
-  - src/lfsr.sv
-  - src/lfsr_16bit.sv
-  - src/lfsr_8bit.sv
-  - src/mv_filter.sv
-  - src/onehot_to_bin.sv
-  - src/plru_tree.sv
-  - src/popcount.sv
-  - src/rr_arb_tree.sv
-  - src/rstgen_bypass.sv
-  - src/serial_deglitch.sv
-  - src/shift_reg.sv
-  - src/shift_reg_gated.sv
-  - src/spill_register_flushable.sv
-  - src/stream_demux.sv
-  - src/stream_filter.sv
-  - src/stream_fork.sv
-  - src/stream_intf.sv
-  - src/stream_join.sv
-  - src/stream_mux.sv
-  - src/stream_throttle.sv
-  - src/lossy_valid_to_stream.sv
-  - src/sub_per_hash.sv
-  - src/sync.sv
-  - src/sync_wedge.sv
-  - src/unread.sv
-  - src/read.sv
-  - src/cdc_reset_ctrlr_pkg.sv
-  # Level 1
-  - src/clk_int_div_static.sv
-  - src/addr_decode_napot.sv
-  - src/cdc_2phase.sv
-  - src/cdc_4phase.sv
-  - src/addr_decode.sv
+      - src/addr_decode_dync.sv
+      - src/cb_filter_pkg.sv
+      - src/cc_onehot.sv
+      - src/cdc_reset_ctrlr_pkg.sv
+      - src/cf_math_pkg.sv
+      - src/clk_int_div.sv
+      - src/delta_counter.sv
+      - src/ecc_pkg.sv
+      - src/edge_propagator_tx.sv
+      - src/exp_backoff.sv
+      - src/fifo_v3.sv
+      - src/gray_to_binary.sv
+      - src/isochronous_4phase_handshake.sv
+      - src/isochronous_spill_register.sv
+      - src/lfsr.sv
+      - src/lfsr_16bit.sv
+      - src/lfsr_8bit.sv
+      - src/lossy_valid_to_stream.sv
+      - src/mv_filter.sv
+      - src/onehot_to_bin.sv
+      - src/plru_tree.sv
+      - src/popcount.sv
+      - src/rr_arb_tree.sv
+      - src/rstgen_bypass.sv
+      - src/serial_deglitch.sv
+      - src/shift_reg.sv
+      - src/shift_reg_gated.sv
+      - src/spill_register_flushable.sv
+      - src/stream_demux.sv
+      - src/stream_filter.sv
+      - src/stream_fork.sv
+      - src/stream_intf.sv
+      - src/stream_join.sv
+      - src/stream_mux.sv
+      - src/stream_throttle.sv
+      - src/sub_per_hash.sv
+      - src/sync.sv
+      - src/sync_wedge.sv
+      - src/unread.sv
+      - src/read.sv
+      # Level 1
+      - src/addr_decode.sv
+      - src/addr_decode_napot.sv
+      - src/cdc_4phase.sv
+      - src/cdc_2phase.sv
+      - src/clk_int_div_static.sv
+
   - target: not(all(xilinx,vivado_ipx))
     files:
-    - src/cb_filter.sv
-  - src/cdc_fifo_2phase.sv
-  - src/counter.sv
-  - src/ecc_decode.sv
-  - src/ecc_encode.sv
-  - src/edge_detect.sv
-  - src/lzc.sv
-  - src/max_counter.sv
-  - src/rstgen.sv
-  - src/spill_register.sv
-  - src/stream_delay.sv
-  - src/stream_fifo.sv
-  - src/stream_fork_dynamic.sv
-  - src/clk_mux_glitch_free.sv
-  # Level 2
-  - src/cdc_reset_ctrlr.sv
-  - src/cdc_fifo_gray.sv
-  - src/fall_through_register.sv
-  - src/id_queue.sv
-  - src/stream_to_mem.sv
-  - src/stream_arbiter_flushable.sv
-  - src/stream_fifo_optimal_wrap.sv
-  - src/stream_register.sv
-  - src/stream_xbar.sv
-  # Level 3
-  - src/cdc_fifo_gray_clearable.sv
-  - src/cdc_2phase_clearable.sv
-  - src/mem_to_banks_detailed.sv
-  - src/stream_arbiter.sv
-  - src/stream_omega_net.sv
-  # Level 4
-  - src/mem_to_banks.sv
+      - src/cb_filter.sv
+      - src/cdc_fifo_2phase.sv
+      - src/clk_mux_glitch_free.sv
+      - src/counter.sv
+      - src/ecc_decode.sv
+      - src/ecc_encode.sv
+      - src/edge_detect.sv
+      - src/lzc.sv
+      - src/max_counter.sv
+      - src/rstgen.sv
+      - src/spill_register.sv
+      - src/stream_delay.sv
+      - src/stream_fifo.sv
+      - src/stream_fork_dynamic.sv
+      # Level 2
+      - src/cdc_reset_ctrlr.sv
+      - src/cdc_fifo_gray.sv
+      - src/fall_through_register.sv
+      - src/id_queue.sv
+      - src/stream_to_mem.sv
+      - src/stream_arbiter_flushable.sv
+      - src/stream_fifo_optimal_wrap.sv
+      - src/stream_register.sv
+      - src/stream_xbar.sv
+      # Level 3
+      - src/cdc_fifo_gray_clearable.sv
+      - src/cdc_2phase_clearable.sv
+      - src/mem_to_banks_detailed.sv
+      - src/stream_arbiter.sv
+      - src/stream_omega_net.sv
+      # Level 4
+      - src/mem_to_banks.sv
 
   - target: simulation
     files:

README.md

@@ -68,6 +68,7 @@ Please note that cells with status *deprecated* are not to be used for new desig
 | Name                       | Description                                                                                               | Status       | Superseded By |
 |----------------------------|-----------------------------------------------------------------------------------------------------------|--------------|---------------|
 | `addr_decode`              | Address map decoder                                                                                       | active       |               |
+| `addr_decode_dync`         | Address map decoder extended to support dynamic online configuration                                      | active       |               |
 | `addr_decode_napot`        | Address map decoder using naturally-aligned power of two (NAPOT) regions                                  | active       |               |
 | `ecc_decode`               | SECDED Decoder (Single Error Correction, Double Error Detection)                                          | active       |               |
 | `ecc_encode`               | SECDED Encoder (Single Error Correction, Double Error Detection)                                          | active       |               |

common_cells.core

@@ -10,6 +10,7 @@ filesets:
       # Source files grouped in levels. Files in level 0 have no dependencies on files in this package.
       # Files in level 1 only depend on files in level 0, files in level 2 on files in levels 1 and 0,
       # etc. Files within a level are ordered alphabetically.
+      - src/addr_decode_dync.sv
       - src/binary_to_gray.sv
       - src/cb_filter_pkg.sv
       - src/cc_onehot.sv

src_files.yml

@@ -6,6 +6,7 @@ common_cells_all:
     # package. Files in level 1 only depend on files in level 0, files in level 2 on files in
     # levels 1 and 0, etc. Files within a level are ordered alphabetically.
     # Level 0
+    - src/addr_decode_dync.sv
     - src/binary_to_gray.sv
     - src/cb_filter_pkg.sv
     - src/cc_onehot.sv