Fix multi-set hit in L1

[micprog]

The serial lookup for the cache can occasionally have multiple hits, which is detrimental to performance. Tracing the issue, this is due to a tag miss occurring in the first cycle, in the following cycle the refill from a previous requester arrives, but the previous miss was not aware of this refill and thus triggers another refill of the same address. This PR fixes this by directly forwarding the refill to the requestor in case of a match, avoiding a second refill.

@nicomar0

[paulsc96]

LGTM, assuming the refill_wdata_q register for the forwarding is negligible in complexity.

[micprog]

LGTM, assuming the refill_wdata_q register for the forwarding is negligible in complexity.

I believe it is a full cache line, so may not be negligible. Merging with another register should be possible, though, although will significantly decrease readability...

[SamuelRiedel]

LGTM. The overhead of an entire cache line will not be negligible, but since, in my opinion, this is more of a correctness fix than a performance optimization, I would merge it as is.