Code

Testing hyperram on FPGA#272

Code

Draft

CyrilKoe wants to merge 5 commits intomainpulp-platform/carfield:mainfrom ck/hyperrampulp-platform/carfield:ck/hyperramCopy head branch name to clipboard

+448-1,518

Commits

Commits on Aug 29, 2024

• fpga: Testing hyperram in block design

  CyrilKoe

  committed
  aa5c168

• fpga: Testing hyperram in vanilla

  CyrilKoe

  committed
  5ee14d7

• fpga: Correct Xilinx IP verilog to follow the standard

  CyrilKoe

  committed
  e4db6c6

• fpga: Adding hyperram CDC constraints

  CyrilKoe

  committed
  a3b96bd

• fpga: Adding pads in vanilla

  CyrilKoe

  committed
  44fb3e4