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fpga: Removed hyperbus for this PR
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CyrilKoe committed Nov 14, 2024
1 parent eaa86e5 commit 7e0f929
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16 changes: 14 additions & 2 deletions docs/tg/xilinx.md
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Expand Up @@ -8,8 +8,10 @@ Additionally, for on-chip debugging you need:

We currently provide working setups for:

- Xilinx VCU128 with Vivado `>= 2020.2`
- Xilinx VCU118 with Vivado `>= 2020.2`
- Xilinx VCU128 with Vivado `== 2020.2`
- Xilinx VCU118 with Vivado `== 2020.2`

**Note: Certain version of Vivado might cause issue, until these issues are resolved it is safer to use 2020.2**

We are working on support for more boards in the future.

Expand All @@ -25,6 +27,16 @@ design flow to link Carfield with external IPs. This flow is less human readable
integrating more complex IPs as Xilinx Ethernet. *Note that this may require you to own the
respective licenses.*

## For impatient readers

The recommended command to build a bitstream (for VCU128) is

```bash
make car-xil-all XILINX_FLAVOR=bd VIVADO="vitis-2020.2 vivado" VIVADO_MODE=gui XILINX_BOARD=vcu128 GEN_NO_HYPERBUS=1 GEN_EXT_JTAG=1 CARFIELD_CONFIG=carfield_l2dual_spatz_periph
```

Please find below more explanations.

## Building the vanilla bistream (VCU128 only)

Due to the structure of the Makefile flow. All the following commands are to be executed at the root
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59 changes: 0 additions & 59 deletions target/xilinx/flavor_bd/constraints/vcu118_hyperbus.xdc

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54 changes: 0 additions & 54 deletions target/xilinx/flavor_bd/constraints/vcu128_hyperbus.xdc

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17 changes: 0 additions & 17 deletions target/xilinx/flavor_bd/scripts/carfield_bd_hyperbus.tcl

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6 changes: 0 additions & 6 deletions target/xilinx/flavor_bd/scripts/run.tcl
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Expand Up @@ -32,12 +32,6 @@ if {[info exists ::env(GEN_EXT_JTAG)] && ($::env(GEN_EXT_JTAG)==1)} {
import_files -fileset constrs_1 -norecurse constraints/$::env(XILINX_BOARD)_ext_jtag.xdc
}

# Add the hyperbus pins to block design
if {![info exists ::env(GEN_NO_HYPERBUS)] || ($::env(GEN_NO_HYPERBUS)==0)} {
source scripts/carfield_bd_hyperbus.tcl
import_files -fileset constrs_1 -norecurse constraints/$::env(XILINX_BOARD)_hyperbus.xdc
}

make_wrapper -files [get_files $project/$project.srcs/sources_1/bd/design_1/design_1.bd] -top
add_files -norecurse $project/$project.gen/sources_1/bd/design_1/hdl/design_1_wrapper.v

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90 changes: 0 additions & 90 deletions target/xilinx/flavor_vanilla/constraints/vcu128_hyperbus.xdc

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1 change: 1 addition & 0 deletions target/xilinx/flavor_vanilla/flavor_vanilla.mk
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Expand Up @@ -46,6 +46,7 @@ $(CAR_XIL_DIR)/flavor_vanilla/scripts/add_sources.tcl: Bender.yml

# Compile bitstream
$(CAR_XIL_DIR)/flavor_vanilla/out/%.bit: $(xilinx_ips_paths_vanilla) $(CAR_XIL_DIR)/flavor_vanilla/scripts/add_sources.tcl
@if [ "$(GEN_NO_HYPERBUS)" != "1" ]; then echo "Hyperbus not supported yet in this branch"; fi;
@mkdir -p $(CAR_XIL_DIR)/flavor_vanilla/out
cd $(CAR_XIL_DIR)/flavor_vanilla && $(vivado_env) $(VIVADO) $(VIVADO_FLAGS) -source scripts/run.tcl
find $(CAR_XIL_DIR)/flavor_vanilla/carfield* -name "*.ltx" -o -name "*.bit" -o -name "*routed.rpt" | xargs -I {} cp {} $(CAR_XIL_DIR)/flavor_vanilla/out
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