[HW/SW] Cheshire integration - Linux on FPGA#319

Merged

mp-17 merged 21 commits intomainfrom mp/pulp-v1-os-fpga

Jan 7, 2025

+885-86

Commits on Jan 7, 2025

Add back-referencing bitstream compile flow to Cheshire

authored and
mp-17
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Fix back reference target

authored and
mp-17
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Change target from -all to -vcu128

authored and
mp-17
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Add ARA_CONFIGURATION parameter to cheshire/Makefile

committed
[cheshire/sw] Add basic software support for Cheshire
mp-17
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[cheshire] Fix relative path in makefile
mp-17
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[cheshire] Back-ref sw compilation flow for fmatmul
mp-17
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Expose cheshire FPGA flash target to Ara

moimfeld
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mp-17
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Add device tree patch for cheshire

moimfeld
authored and
mp-17
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Add backreferencing for simulation of Cheshire + Ara

moimfeld
authored and
mp-17
committed
[cheshire] Add cva6-sdk submodule
mp-17
committed
[cheshire] Add RVV-Linux img compilation flow
mp-17
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[ci] Bump upload artifact action to v4
mp-17
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[apps] Enable LINUX compilation for apps

mp-17
and
MaistoV
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[cheshire] Add LINUX + SW flow for cheshire

mp-17
and
MaistoV
committed
[cheshire] Parametrize FPGA flow

mojtaba
authored and
mp-17
committed
[cheshire] Update READMEs
mp-17
committed
[cheshire] Add config parametrization to RVV kernels
mp-17
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[CHANGELOG] Update Changelog
mp-17
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[cheshire] 🐛 Quote variables in Makefile
mp-17
committed
[cheshire] Copy install64 instead of softlinking
mp-17
committed