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[CHANGELOG] Update Changelog
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mp-17 committed Jan 7, 2025
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Expand Up @@ -28,6 +28,8 @@ and this project adheres to [Semantic Versioning](http://semver.org/spec/v2.0.0.
- Fix vector slicing bug in operand requesters
- Fix legality check for allowed registers in dispatcher
- Remove a couple of latches
- Fix dispatcher state change upon vector CSR instruction
- Force a reshuffle when `vl == vlmax && vstart > 0`

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