intel/dev: add new atm pci id 0x56c2

android/Android.mk

@@ -183,8 +183,8 @@ ifneq ($(strip $(BOARD_MESA3D_GALLIUM_DRIVERS)),)
 $(eval $(call mesa3d-lib,libgallium_dri,.so.0,dri,MESA3D_GALLIUM_DRI_BIN))
 # Module 'libglapi', produces '/vendor/lib{64}/libglapi.so'
 $(eval $(call mesa3d-lib,libglapi,.so.0,,MESA3D_LIBGLAPI_BIN))
-# Module 'libpps-producer', produces '/vendor/lib{64}/libpps-producer.so'
-$(eval $(call mesa3d-lib,libpps-producer,.so.0,,MESA3D_LIBPPS_PRODUCER))
+# Module 'libgpudataproducer', produces '/vendor/lib{64}/libgpudataproducer.so'
+$(eval $(call mesa3d-lib,libgpudataproducer,.so.0,,MESA3D_LIBPPS_PRODUCER))
 
 # Module 'libEGL_mesa', produces '/vendor/lib{64}/egl/libEGL_mesa.so'
 $(eval $(call mesa3d-lib,libEGL_mesa,.so.1,egl,MESA3D_LIBEGL_BIN))
@@ -206,10 +206,9 @@ endif
 #-------------------------------------------------------------------------------
 
 include $(CLEAR_VARS)
-LOCAL_SHARED_LIBRARIES := libpps-producer
 LOCAL_SRC_FILES := perfetto/pps-producer.cc
 LOCAL_VENDOR_MODULE := true
-LOCAL_MODULE := pps-producer
+LOCAL_MODULE := gpudataproducer
 LOCAL_CPP_EXTENSION := .cc
 LOCAL_MODULE_TAGS := optional
 include $(BUILD_EXECUTABLE)

android/mesa3d_cross.mk

@@ -96,6 +96,7 @@ MESON_GEN_NINJA := \
 	-Dlmsensors=disabled                                                         \
 	-Dandroid-libbacktrace=disabled                                              \
 	-Dperfetto=true                                                              \
+	-Ddatasources=auto                                                           \
 	$(BOARD_MESA3D_MESON_ARGS)                                                   \
 
 MESON_BUILD := PATH=/usr/bin:/bin:/sbin:$$PATH ninja -C $(MESON_OUT_DIR)/build

android/perfetto/pps-producer.cc

@@ -1,5 +1,30 @@
-extern int pps_main(int argc, const char **argv);
+#include <cstdio>
+#include <dlfcn.h>
+
+typedef void (*pps_main_fn_t)(int, const char **);
+
+#define PPS_LIB "/vendor/lib64/libgpudataproducer.so"
 
 int main(int argc, const char **argv) {
-    return pps_main(argc, argv);
+  char *error;
+
+  void *handle = dlopen(PPS_LIB, RTLD_GLOBAL);
+  if ((error = dlerror()) != nullptr || handle == nullptr) {
+    fprintf(stdout, "Error loading lib: %s\n", error);
+    return -1;
+  }
+
+  pps_main_fn_t ppsFn = (pps_main_fn_t)dlsym(handle, "pps_main");
+  if (((error = dlerror()) != nullptr) || (ppsFn == nullptr)) {
+    fprintf(stdout, "Error looking for pps_main symbol: %s\n", error);
+    dlclose(handle);
+    return -1;
+  }
+
+  fprintf(stdout, "start call pps_main\n");
+  (*ppsFn)(argc, argv);
+  fprintf(stdout, "end call pps_main\n");
+
+  dlclose(handle);
+  return 0;
 }

include/pci_ids/iris_pci_ids.h

@@ -242,6 +242,7 @@ CHIPSET(0x56a3, dg2_g12, "DG2", "Intel(R) Graphics")
 CHIPSET(0x56a4, dg2_g12, "DG2", "Intel(R) Graphics")
 CHIPSET(0x56a5, dg2_g11, "DG2", "Intel(R) Arc(tm) A380 Graphics")
 CHIPSET(0x56a6, dg2_g11, "DG2", "Intel(R) Arc(tm) A310 Graphics")
+CHIPSET(0x56af, dg2_g10, "DG2", "Intel(R) Arc(tm) A760 Graphics")
 CHIPSET(0x56b0, dg2_g11, "DG2", "Intel(R) Arc(tm) Pro A30M Graphics")
 CHIPSET(0x56b1, dg2_g11, "DG2", "Intel(R) Arc(tm) Pro A40/A50 Graphics")
 CHIPSET(0x56b2, dg2_g12, "DG2", "Intel(R) Graphics")
@@ -252,6 +253,7 @@ CHIPSET(0x56bc, dg2_g11, "DG2", "Intel(R) Graphics")
 CHIPSET(0x56bd, dg2_g11, "DG2", "Intel(R) Graphics")
 CHIPSET(0x56c0, atsm_g10, "ATS-M", "Intel(R) Data Center GPU Flex Series 170 Graphics")
 CHIPSET(0x56c1, atsm_g11, "ATS-M", "Intel(R) Data Center GPU Flex Series 140 Graphics")
+CHIPSET(0x56c2, atsm_g10, "ATS-M", "Intel(R) Data Center GPU Flex Series 170 Graphics")
 
 CHIPSET(0x7d40, mtl_u, "MTL", "Intel(R) Graphics")
 CHIPSET(0x7d45, mtl_h, "MTL", "Intel(R) Graphics")

meson.build

@@ -205,6 +205,7 @@ with_gallium_kmsro = system_has_kms_drm and [
   with_gallium_panfrost,
   with_gallium_v3d,
   with_gallium_vc4,
+  with_gallium_iris,
 ].contains(true)
 
 _vulkan_drivers = get_option('vulkan-drivers')

src/egl/drivers/dri2/egl_dri2.c

@@ -1557,9 +1557,11 @@ dri2_create_context(_EGLDisplay *disp, _EGLConfig *conf,
    } else
       dri_config = NULL;
 
+#ifdef HAVE_ANDROID_PLATFORM
    if (intel_lower_ctx_priority()) {
       dri2_ctx->base.ContextPriority = EGL_CONTEXT_PRIORITY_LOW_IMG;
    }
+#endif
 
    if (!dri2_fill_context_attribs(dri2_ctx, dri2_dpy, ctx_attribs,
                                   &num_attribs))

src/gallium/auxiliary/pipe-loader/meson.build

@@ -56,6 +56,9 @@ endif
 if with_gallium_asahi
   renderonly_drivers_c_args += '-DGALLIUM_ASAHI'
 endif
+if with_gallium_iris
+  renderonly_drivers_c_args += '-DGALLIUM_IRIS'
+endif
 
 libpipe_loader_static = static_library(
   'pipe_loader_static',

src/gallium/auxiliary/pipe-loader/pipe_loader_drm.c

@@ -295,6 +295,9 @@ pipe_loader_get_compatible_render_capable_device_fd(int kms_only_fd)
 #endif
 #if defined GALLIUM_VC4
       "vc4",
+#endif
+#if defined GALLIUM_IRIS
+      "i915",
 #endif
    };
 
@@ -303,10 +306,12 @@ pipe_loader_get_compatible_render_capable_device_fd(int kms_only_fd)
    is_platform_device = (dev->type == PIPE_LOADER_DEVICE_PLATFORM);
    pipe_loader_release(&dev, 1);
 
+#ifndef GALLIUM_IRIS
    /* For display-only devices that are not on the platform bus, we can't assume
     * that any of the rendering devices are compatible. */
    if (!is_platform_device)
       return -1;
+#endif
 
    /* For platform display-only devices, we try to find a render-capable device
     * on the platform bus and that should be compatible with the display-only

src/gallium/auxiliary/target-helpers/drm_helper.h

@@ -68,6 +68,7 @@ const struct drm_driver_descriptor descriptor_name = {         \
 #undef GALLIUM_PANFROST
 #undef GALLIUM_LIMA
 #undef GALLIUM_ASAHI
+#undef GALLIUM_IRIS
 #endif
 
 #ifdef GALLIUM_I915
@@ -454,6 +455,9 @@ const driOptionDescription kmsro_driconf[] = {
 #ifdef GALLIUM_FREEDRENO
       #include "freedreno/driinfo_freedreno.h"
 #endif
+#ifdef GALLIUM_IRIS
+      #include "iris/driinfo_iris.h"
+#endif
 };
 DRM_DRIVER_DESCRIPTOR(kmsro, kmsro_driconf, ARRAY_SIZE(kmsro_driconf))
 

src/gallium/drivers/iris/iris_resource.c

@@ -54,6 +54,8 @@
 #include "isl/isl.h"
 #include "drm-uapi/drm_fourcc.h"
 #include "drm-uapi/i915_drm.h"
+#include "renderonly/renderonly.h"
+#include "util/u_drm.h"
 
 enum modifier_priority {
    MODIFIER_PRIORITY_INVALID = 0,
@@ -560,7 +562,12 @@ static void
 iris_resource_destroy(struct pipe_screen *screen,
                       struct pipe_resource *p_res)
 {
+
    struct iris_resource *res = (struct iris_resource *) p_res;
+   struct iris_screen *pscreen = (struct iris_screen *)screen;
+
+   if (res->scanout)
+      renderonly_scanout_destroy(res->scanout, pscreen->ro);
 
    if (p_res->target == PIPE_BUFFER)
       util_range_destroy(&res->valid_buffer_range);
@@ -1133,7 +1140,6 @@ iris_resource_create_for_image(struct pipe_screen *pscreen,
    struct iris_screen *screen = (struct iris_screen *)pscreen;
    const struct intel_device_info *devinfo = screen->devinfo;
    struct iris_resource *res = iris_alloc_resource(pscreen, templ);
-
    if (!res)
       return NULL;
 
@@ -1225,6 +1231,12 @@ iris_resource_create_for_image(struct pipe_screen *pscreen,
       res->base.is_shared = true;
    }
 
+   if (screen->ro &&
+       (templ->bind & (PIPE_BIND_DISPLAY_TARGET |
+                       PIPE_BIND_SCANOUT | PIPE_BIND_SHARED))) {
+      res->scanout = renderonly_scanout_for_resource(&res->base.b, screen->ro, NULL);
+   }
+
    return &res->base.b;
 
 fail:
@@ -1394,6 +1406,17 @@ iris_resource_from_handle(struct pipe_screen *pscreen,
    res->offset = whandle->offset;
    res->surf.row_pitch_B = whandle->stride;
 
+   if (screen->ro) {
+      /* Make sure that renderonly has a handle to our buffer in the
+       * display's fd, so that a later renderonly_get_handle()
+       * returns correct handles or GEM names.
+       */
+      res->scanout =
+              renderonly_create_gpu_import_for_resource(&res->base.b,
+                                                        screen->ro,
+                                                        NULL);
+   }
+
    if (whandle->plane == 0) {
       /* All planes are present. Fill out the main plane resource(s). */
       for (unsigned plane = 0; plane < util_resource_num(templ); plane++) {
@@ -1904,6 +1927,9 @@ iris_resource_get_handle(struct pipe_screen *pscreen,
    case WINSYS_HANDLE_TYPE_KMS: {
       iris_gem_set_tiling(bo, &res->surf);
 
+      if (screen->ro && res->scanout) {
+         return renderonly_get_handle(res->scanout, whandle);
+      }
       /* Because we share the same drm file across multiple iris_screen, when
        * we export a GEM handle we must make sure it is valid in the DRM file
        * descriptor the caller is using (this is the FD given at screen

src/gallium/drivers/iris/iris_resource.h

@@ -55,6 +55,7 @@ struct iris_format_info {
 struct iris_resource {
    struct threaded_resource base;
    enum pipe_format internal_format;
+   struct renderonly_scanout *scanout;
 
    /**
     * The ISL surface layout information for this resource.

src/gallium/drivers/iris/iris_screen.c

@@ -59,6 +59,7 @@
 #include "intel/common/intel_l3_config.h"
 #include "intel/common/intel_uuid.h"
 #include "iris_monitor.h"
+#include "renderonly/renderonly.h"
 
 #define genX_call(devinfo, func, ...)             \
    switch ((devinfo)->verx10) {                   \
@@ -677,6 +678,7 @@ iris_screen_destroy(struct iris_screen *screen)
    iris_bufmgr_unref(screen->bufmgr);
    disk_cache_destroy(screen->disk_cache);
    close(screen->winsys_fd);
+   free(screen->ro);
    ralloc_free(screen);
 }
 

src/gallium/drivers/iris/iris_screen.h

@@ -161,6 +161,7 @@ struct iris_address {
 
 struct iris_screen {
    struct pipe_screen base;
+   struct renderonly *ro;
 
    uint32_t refcount;
 

src/gallium/winsys/iris/drm/iris_drm_public.h

@@ -26,8 +26,13 @@
 
 struct pipe_screen;
 struct pipe_screen_config;
+struct renderonly;
 
 struct pipe_screen *
 iris_drm_screen_create(int drm_fd, const struct pipe_screen_config *config);
 
+struct pipe_screen *
+iris_screen_create_renderonly(int fd, struct renderonly *ro,
+                              const struct pipe_screen_config *config);
+
 #endif /* IRIS_DRM_PUBLIC_H */

src/gallium/winsys/iris/drm/iris_drm_winsys.c

@@ -26,11 +26,31 @@
 
 #include "util/os_file.h"
 
+#include "renderonly/renderonly.h"
+#include "kmsro/drm/kmsro_drm_public.h"
 #include "iris_drm_public.h"
+#include "iris/iris_screen.h"
+
 extern struct pipe_screen *iris_screen_create(int fd, const struct pipe_screen_config *config);
 
 struct pipe_screen *
 iris_drm_screen_create(int fd, const struct pipe_screen_config *config)
 {
    return iris_screen_create(fd, config);
 }
+
+struct pipe_screen *
+iris_screen_create_renderonly(int fd, struct renderonly *ro,
+                              const struct pipe_screen_config *config)
+{
+   struct iris_screen *pscreen;
+
+   pscreen = (struct iris_screen *)iris_screen_create(os_dupfd_cloexec(fd), config);
+   if (!pscreen)
+      return NULL;
+
+   pscreen->ro = ro;
+   pscreen->winsys_fd = ro->kms_fd;
+
+   return &pscreen->base;
+}

src/gallium/winsys/iris/drm/meson.build

@@ -18,12 +18,19 @@
 # OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 # SOFTWARE.
 
+iris_drm_winsys_c_args = []
+if with_gallium_kmsro
+  iris_drm_winsys_c_args += '-DGALLIUM_KMSRO'
+endif
+
 libiriswinsys = static_library(
   'iriswinsys',
   files('iris_drm_winsys.c'),
   include_directories : [
     inc_src, inc_include,
-    inc_gallium, inc_gallium_aux, inc_gallium_drivers,
+    inc_gallium, inc_gallium_aux, inc_gallium_drivers, inc_gallium_winsys, inc_intel,
   ],
+  c_args : [iris_drm_winsys_c_args],
+  dependencies: [ idep_intel_dev ],
   gnu_symbol_visibility : 'hidden',
 )

src/gallium/winsys/kmsro/drm/kmsro_drm_winsys.c

@@ -33,6 +33,7 @@
 #include "panfrost/drm/panfrost_drm_public.h"
 #include "lima/drm/lima_drm_public.h"
 #include "asahi/drm/asahi_drm_public.h"
+#include "iris/drm/iris_drm_public.h"
 #include "xf86drm.h"
 
 #include "pipe/p_screen.h"
@@ -119,6 +120,11 @@ struct pipe_screen *kmsro_drm_screen_create(int kms_fd,
        */
       ro->create_for_resource = renderonly_create_gpu_import_for_resource;
       screen = vc4_drm_screen_create_renderonly(ro->gpu_fd, ro, config);
+#endif
+   } else if (strcmp(render_dev_name, "i915") == 0) {
+#if defined(GALLIUM_IRIS)
+      ro->create_for_resource = renderonly_create_gpu_import_for_resource,
+      screen = iris_screen_create_renderonly(ro->gpu_fd, ro, config);
 #endif
    }