genxml: generate opencl packing headers

Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26797>
projectceladon · Feb 13, 2024 · 41b2ed6 · 41b2ed6
1 parent 2a0328b
commit 41b2ed6
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Showing 8 changed files with 417 additions and 113 deletions.
diff --git a/src/intel/common/meson.build b/src/intel/common/meson.build
@@ -132,7 +132,7 @@ if with_tests and not with_platform_android
       'genxml_test',
       ['tests/genxml_test.c', gentest_pack],
       include_directories : [inc_include, inc_src, inc_intel],
-      dependencies : [idep_mesautil, idep_intel_dev],
+      dependencies : [idep_mesautil, idep_intel_dev, idep_genxml],
       link_with : libintel_common,
       c_args : [
         '-DGENXML_DIR="@0@"'.format(fs.parent(genxml_path)),

diff --git a/src/intel/genxml/genX_cl_helpers.h b/src/intel/genxml/genX_cl_helpers.h
@@ -0,0 +1,182 @@
+/* Copyright © 2023 Intel Corporation
+ * SPDX-License-Identifier: MIT
+ */
+
+#ifndef __GENX_CL_HELPERS_H__
+#define __GENX_CL_HELPERS_H__
+
+#define ALWAYS_INLINE inline __attribute__((always_inline))
+#define UNUSED
+#define BITFIELD64_MASK(bits) ((1ul << bits) - 1)
+#define CLAMP( X, MIN, MAX )  ( (X)>(MIN) ? ((X)>(MAX) ? (MAX) : (X)) : (MIN) )
+#define INT64_MAX (0x7FFFFFFFFFFFFFFFL)
+
+ALWAYS_INLINE static uint64_t
+u_uintN_max(uint32_t bits)
+{
+   return (1ul << bits) - 1;
+}
+
+ALWAYS_INLINE static int64_t
+u_intN_max(uint32_t bit_size)
+{
+   return INT64_MAX >> (64 - bit_size);
+}
+
+ALWAYS_INLINE static int64_t
+u_intN_min(uint32_t bit_size)
+{
+   /* On 2's compliment platforms, which is every platform Mesa is likely to
+    * every worry about, stdint.h generally calculated INT##_MIN in this
+    * manner.
+    */
+   return (-u_intN_max(bit_size)) - 1;
+}
+
+ALWAYS_INLINE static uint64_t
+util_bitpack_uint(uint64_t v, uint32_t start, UNUSED uint32_t end)
+{
+   return v << start;
+}
+
+ALWAYS_INLINE static uint64_t
+util_bitpack_uint_nonzero(uint64_t v, uint32_t start, uint32_t end)
+{
+   return util_bitpack_uint(v, start, end);
+}
+
+ALWAYS_INLINE static uint64_t
+util_bitpack_sint(int64_t v, uint32_t start, uint32_t end)
+{
+   int32_t bits = end - start + 1;
+
+   uint64_t mask = BITFIELD64_MASK(bits);
+
+   return (v & mask) << start;
+}
+
+ALWAYS_INLINE static uint64_t
+util_bitpack_sint_nonzero(int64_t v, uint32_t start, uint32_t end)
+{
+   return util_bitpack_sint(v, start, end);
+}
+
+ALWAYS_INLINE static uint32_t
+util_bitpack_float(float v)
+{
+   union { float f; uint32_t dw; } x;
+   x.f = v;
+   return x.dw;
+}
+
+ALWAYS_INLINE static uint32_t
+util_bitpack_float_nonzero(float v)
+{
+   return util_bitpack_float(v);
+}
+
+ALWAYS_INLINE static uint64_t
+util_bitpack_sfixed(float v, uint32_t start, uint32_t end,
+                    uint32_t fract_bits)
+{
+   float factor = (1 << fract_bits);
+
+   int64_t int_val = round(v * factor);
+   uint64_t mask = ~0ul >> (64 - (end - start + 1));
+
+   return (int_val & mask) << start;
+}
+
+ALWAYS_INLINE static uint64_t
+util_bitpack_sfixed_clamp(float v, uint32_t start, uint32_t end,
+                          uint32_t fract_bits)
+{
+   float factor = (1 << fract_bits);
+
+   uint32_t total_bits = end - start + 1;
+   float min = u_intN_min(total_bits) / factor;
+   float max = u_intN_max(total_bits) / factor;
+
+   int64_t int_val = round(CLAMP(v, min, max) * factor);
+   uint64_t mask = ~0ul >> (64 - (end - start + 1));
+
+   return (int_val & mask) << start;
+}
+
+ALWAYS_INLINE static uint64_t
+util_bitpack_sfixed_nonzero(float v, uint32_t start, uint32_t end,
+                            uint32_t fract_bits)
+{
+   return util_bitpack_sfixed(v, start, end, fract_bits);
+}
+
+ALWAYS_INLINE static uint64_t
+util_bitpack_ufixed(float v, uint32_t start, uint32_t end, uint32_t fract_bits)
+{
+   float factor = (1 << fract_bits);
+
+   uint64_t uint_val = round(v * factor);
+
+   return uint_val << start;
+}
+
+ALWAYS_INLINE static uint64_t
+util_bitpack_ufixed_clamp(float v, uint32_t start, uint32_t end, uint32_t fract_bits)
+{
+   float factor = (1 << fract_bits);
+
+   int total_bits = end - start + 1;
+   float min = 0.0f;
+   float max = u_uintN_max(total_bits) / factor;
+
+   uint64_t uint_val = round(CLAMP(v, min, max) * factor);
+
+   return uint_val << start;
+}
+
+ALWAYS_INLINE static uint64_t
+util_bitpack_ufixed_nonzero(float v, uint32_t start, uint32_t end,
+                            uint32_t fract_bits)
+{
+   return util_bitpack_ufixed(v, start, end, fract_bits);
+}
+
+#ifndef __gen_validate_value
+#define __gen_validate_value(x)
+#endif
+
+#ifndef __intel_field_functions
+#define __intel_field_functions
+#endif
+
+#ifdef NDEBUG
+#define NDEBUG_UNUSED __attribute__((unused))
+#else
+#define NDEBUG_UNUSED
+#endif
+
+static inline __attribute__((always_inline)) uint64_t
+__gen_offset(uint64_t v, NDEBUG_UNUSED uint32_t start, NDEBUG_UNUSED uint32_t end)
+{
+   return v;
+}
+
+static inline __attribute__((always_inline)) uint64_t
+__gen_offset_nonzero(uint64_t v, uint32_t start, uint32_t end)
+{
+   return __gen_offset(v, start, end);
+}
+
+static inline __attribute__((always_inline)) uint64_t
+__gen_address(uint64_t address,
+              __attribute__((unused)) uint32_t start, uint32_t end)
+{
+   if (end < 63) {
+      uint32_t shift = 63 - end;
+      return (address << shift) >> shift;
+   } else {
+      return address;
+   }
+}
+
+#endif /* __GENX_CL_HELPERS_H__ */
diff --git a/src/intel/genxml/genX_cl_pack.h b/src/intel/genxml/genX_cl_pack.h
@@ -0,0 +1,40 @@
+/* Copyright © 2023 Intel Corporation
+ * SPDX-License-Identifier: MIT
+ */
+
+#ifndef GENX_CL_PACK_H
+#define GENX_CL_PACK_H
+
+#ifndef GFX_VERx10
+#  error "The GFX_VERx10 macro must be defined"
+#endif
+
+#if (GFX_VERx10 == 40)
+#  include "genxml/gen4_cl_pack.h"
+#elif (GFX_VERx10 == 45)
+#  include "genxml/gen45_cl_pack.h"
+#elif (GFX_VERx10 == 50)
+#  include "genxml/gen5_cl_pack.h"
+#elif (GFX_VERx10 == 60)
+#  include "genxml/gen6_cl_pack.h"
+#elif (GFX_VERx10 == 70)
+#  include "genxml/gen7_cl_pack.h"
+#elif (GFX_VERx10 == 75)
+#  include "genxml/gen75_cl_pack.h"
+#elif (GFX_VERx10 == 80)
+#  include "genxml/gen8_cl_pack.h"
+#elif (GFX_VERx10 == 90)
+#  include "genxml/gen9_cl_pack.h"
+#elif (GFX_VERx10 == 110)
+#  include "genxml/gen11_cl_pack.h"
+#elif (GFX_VERx10 == 120)
+#  include "genxml/gen12_cl_pack.h"
+#elif (GFX_VERx10 == 125)
+#  include "genxml/gen125_cl_pack.h"
+#elif (GFX_VERx10 == 200)
+#  include "genxml/gen20_cl_pack.h"
+#else
+#  error "Need to add a pack header include for this gen"
+#endif
+
+#endif /* GENX_CL_PACK_H */
diff --git a/src/intel/genxml/genX_helpers.h b/src/intel/genxml/genX_helpers.h
@@ -0,0 +1,66 @@
+/* Copyright © 2023 Intel Corporation
+ * SPDX-License-Identifier: MIT
+ */
+
+#ifndef __GENX_HELPERS_H__
+#define __GENX_HELPERS_H__
+
+#ifndef __gen_validate_value
+#define __gen_validate_value(x)
+#endif
+
+#ifndef __intel_field_functions
+#define __intel_field_functions
+#endif
+
+#ifdef NDEBUG
+#define NDEBUG_UNUSED __attribute__((unused))
+#else
+#define NDEBUG_UNUSED
+#endif
+
+#ifndef __gen_address_type
+#error #define __gen_address_type before including this file
+#endif
+
+#ifndef __gen_user_data
+#error #define __gen_combine_address before including this file
+#endif
+
+static inline __attribute__((always_inline)) uint64_t
+__gen_offset(uint64_t v, NDEBUG_UNUSED uint32_t start, NDEBUG_UNUSED uint32_t end)
+{
+   __gen_validate_value(v);
+#ifndef NDEBUG
+   uint64_t mask = (~0ull >> (64 - (end - start + 1))) << start;
+
+   assert((v & ~mask) == 0);
+#endif
+
+   return v;
+}
+
+static inline __attribute__((always_inline)) uint64_t
+__gen_offset_nonzero(uint64_t v, uint32_t start, uint32_t end)
+{
+   assert(v != 0ull);
+   return __gen_offset(v, start, end);
+}
+
+static inline __attribute__((always_inline)) uint64_t
+__gen_address(__gen_user_data *data, void *location,
+              __gen_address_type address, uint32_t delta,
+              __attribute__((unused)) uint32_t start, uint32_t end)
+{
+   uint64_t addr_u64 = __gen_combine_address(data, location, address, delta);
+   if (end == 31) {
+      return addr_u64;
+   } else if (end < 63) {
+      const unsigned shift = 63 - end;
+      return (addr_u64 << shift) >> shift;
+   } else {
+      return addr_u64;
+   }
+}
+
+#endif /* __GENX_HELPERS_H__ */