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[RISCV] Support __riscv_v_fixed_vlen for vbool types. (llvm#76551)
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This adopts a similar behavior to AArch64 SVE, where bool vectors are
represented as a vector of chars with 1/8 the number of elements. This
ensures the vector always occupies a power of 2 number of bytes.

A consequence of this is that vbool64_t, vbool32_t, and vool16_t can
only be used with a vector length that guarantees at least 8 bits.
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topperc authored and pradt2 committed Oct 18, 2024
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2 changes: 2 additions & 0 deletions clang/docs/ReleaseNotes.rst
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Expand Up @@ -1290,6 +1290,8 @@ PowerPC Support
- Added support for ``builtin_cpu_supports`` on AIX, along with a subset of
features that can be queried.

- ``__attribute__((rvv_vector_bits(N))) is now supported for RVV vbool*_t types.
CUDA/HIP Language Changes
^^^^^^^^^^^^^^^^^^^^^^^^^
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