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PCIe interface
Patrik Jakobsson edited this page Aug 31, 2015
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These registers sits on PCI Bar 0 and is related to the PCIe to S2 SoC interface (probably from Broadcom). They relate to PLL settings and power/link states.
Possibly used to set the PCIe link state.
- Written values: 0x10 (L1 state?)
- Written values: 0x1804
Possibly information on PLL power state.
- Written values: 0xac5800
- Compared values: 0xac5800
- Written values: 0x1f08, 0x1608, 0x1708
- Written values: 0x800005bf, 0x80008610, 0x8000fc00
- Put PCIe link into L1 state
- Turn off PLL
- Check if PLL actually turned off (fail if not)
- Do initialization sequence on 0xd128 and 0x12c