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    • HTML Docs for OSVVM
      HTML
      1300Updated Dec 26, 2024Dec 26, 2024
    • Start here. Includes all other OSVVM libraries as submodules: Utility, Common, Verification Component, and Script.
      Other
      195200Updated Dec 7, 2024Dec 7, 2024
    • OSVVM project simulation scripts. Scripts are tedious. These scripts simplify the steps to compile your project for simulation
      Tcl
      Other
      151060Updated Dec 7, 2024Dec 7, 2024
    • Fork of VideoBus by Louis Adriaens
      VHDL
      Apache License 2.0
      2100Updated Dec 7, 2024Dec 7, 2024
    • UART

      Public
      OSVVM UART Verification Components. Uart Transmitter with error injection for parity, stop, and break errors. UART Receiver verification component with error handling for parity, stop, and break errors.
      VHDL
      Other
      8821Updated Dec 7, 2024Dec 7, 2024
    • OSVVM SPI Verification Component.
      VHDL
      Other
      3001Updated Dec 7, 2024Dec 7, 2024
    • OSVVM

      Public
      OSVVM Utility Library: AlertLogPkg, CoveragePkg, RandomPkg, ScoreboardGenericPkg, MemoryPkg, TbUtilPkg, TranscriptPkg, ...
      VHDL
      Other
      6023090Updated Dec 7, 2024Dec 7, 2024
    • Ethernet

      Public
      OSVVM Ethernet Library
      VHDL
      Other
      3300Updated Dec 7, 2024Dec 7, 2024
    • DpRam

      Public
      DpRam
      VHDL
      Other
      4600Updated Dec 7, 2024Dec 7, 2024
    • OSVVM Documentation
      63000Updated Dec 7, 2024Dec 7, 2024
    • CoSim

      Public
      OSVVM submodule for Co-simulation features
      C++
      Other
      3500Updated Dec 7, 2024Dec 7, 2024
    • Packages that implement OSVVM's model independent transactions and other shared verification component support packages. Required for all OSVVM verification components. AddressBusTransactionPkg - AXI, AxiLite, ... StreamTransactionPkg - AxiStream, UART, ...
      VHDL
      Other
      5530Updated Dec 7, 2024Dec 7, 2024
    • AXI4

      Public
      AXI4 Full, Lite, and AxiStream verification components. AXI4 Interface Master, Responder, and Memory verification components. AxiStream transmitter and receiver verification components
      VHDL
      Other
      1813060Updated Dec 7, 2024Dec 7, 2024
    • AvalonST

      Public
      Verification Components for Avalon Stream interface
      Apache License 2.0
      0000Updated Jul 12, 2023Jul 12, 2023
    • AvalonMM

      Public
      Verification components for Avalon MM interface
      Apache License 2.0
      0000Updated Jul 12, 2023Jul 12, 2023
    • .github

      Public
      0000Updated Jul 8, 2023Jul 8, 2023
    • VerificationIP

      Public archive
      Deprecated - This library has been replaced by OsvvmLibraries. The links to the submodules will not be updated to the new versions.
      Other
      1910Updated Jul 22, 2020Jul 22, 2020