Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

[RISCV64] add nhwc layout support for eltwise executor #26531

Merged
merged 4 commits into from
Oct 24, 2024
Merged

[RISCV64] add nhwc layout support for eltwise executor #26531

Show file tree
Hide file tree
Changes from 1 commit
Commits
Show all changes
4 commits
Select commit Hold shift + click to select a range
fc5b94f
[RISCV64] add nhwc layout support for eltwise executor
BHbean Sep 11, 2024
6ea58ff
[RISCV64] add layout check for eltwise executor
BHbean Sep 26, 2024
ecea44a
[RISCV64] reformat based on review comment
BHbean Oct 11, 2024
199ec41
[RISCV64] reformat based on review comment
BHbean Oct 17, 2024
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
2 changes: 2 additions & 0 deletions src/plugins/intel_cpu/src/nodes/eltwise.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -2585,6 +2585,8 @@ void Eltwise::initSupportedPrimitiveDescriptors() {
};

addDesc(supportedPrimitiveDescriptors, Planar);
if (isChannelsFirstApplicable)
addDesc(supportedPrimitiveDescriptors, ChannelsFirst);
a-sidorova marked this conversation as resolved.
Show resolved Hide resolved

canUseEltwiseExecPtr = !supportedPrimitiveDescriptors.empty();
if (!supportedPrimitiveDescriptors.empty())
Expand Down
18 changes: 2 additions & 16 deletions src/plugins/intel_cpu/src/nodes/executors/shl/shl_eltwise.cpp
View file
Open in desktop
a-sidorova marked this conversation as resolved.
Show resolved Hide resolved
Original file line number Diff line number Diff line change
Expand Up @@ -10,17 +10,6 @@
namespace ov {
namespace intel_cpu {

inline void log_unsupported_prec(const std::vector<MemoryDescPtr>& srcDescs,
const std::vector<MemoryDescPtr>& dstDescs,
const Algorithm eltwiseAlgorithm) {
std::string srcPrec;
for (size_t i = 0; i < srcDescs.size(); i++) {
srcPrec += srcDescs[i]->getPrecision().to_string() + " ";
}
DEBUG_LOG(algToString(eltwiseAlgorithm), ": provided combination of src precisions: [", srcPrec,
"] and dst precision: ", dstDescs[0]->getPrecision().to_string(), " is not supported");
}

bool ShlEltwiseExecutor::isEltwiseAlgorithmSupported(Algorithm algorithm) {
if (one_of(algorithm, Algorithm::EltwiseAdd,
Algorithm::EltwiseSubtract,
Expand Down Expand Up @@ -93,14 +82,11 @@ bool ShlEltwiseExecutor::init(const EltwiseAttrs &eltwiseAttrs,
srcTensors = std::vector<ShlTensor>(srcDescs.size());
dstTensors = std::vector<ShlTensor>(dstDescs.size());

// Allocate Shl session
sess = ShlSession();

for (size_t i = 0; i < srcDescs.size(); i++) {
srcTensors[i] = ShlTensor(sess, precisionToShlDataType(srcDescs[i]->getPrecision()), getShlDataLayoutByMemoryDesc(srcDescs[i]), srcDescs[i]->getShape().getStaticDims());
srcTensors[i] = ShlTensor(sess, precisionToShlDataType(srcDescs[i]->getPrecision()), getShlDataLayoutByMemoryDesc(srcDescs[i]), srcDescs[i]->as<BlockedMemoryDesc>()->getBlockDims());
}
for (size_t i = 0; i < dstDescs.size(); i++) {
dstTensors[i] = ShlTensor(sess, precisionToShlDataType(dstDescs[i]->getPrecision()), getShlDataLayoutByMemoryDesc(dstDescs[i]), dstDescs[i]->getShape().getStaticDims());
dstTensors[i] = ShlTensor(sess, precisionToShlDataType(dstDescs[i]->getPrecision()), getShlDataLayoutByMemoryDesc(dstDescs[i]), dstDescs[i]->as<BlockedMemoryDesc>()->getBlockDims());
}

std::function<int()> initFunc = nullptr;
Expand Down
1 change: 1 addition & 0 deletions src/plugins/intel_cpu/src/nodes/executors/shl/shl_utils.hpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -6,6 +6,7 @@
#include "csinn/csinn_data_structure.h"
#include "csinn/csinn_runtime.h"
#include "memory_desc/cpu_memory_desc.h"
#include "memory_desc/cpu_blocked_memory_desc.h"
a-sidorova marked this conversation as resolved.
Show resolved Hide resolved


namespace ov {
Expand Down
2 changes: 0 additions & 2 deletions ...s/intel_cpu/tests/functional/custom/subgraph_tests/src/common/concat_conv_sum_inplace.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -48,8 +48,6 @@ class ReLuConcatConvSumInPlaceTest : virtual public SubgraphBaseStaticTest {
const size_t convOutChannels = 64;
#if defined(OPENVINO_ARCH_X86) || defined(OPENVINO_ARCH_X86_64)
const auto targetFormat = with_cpu_x86_avx512_core() ? nChw16c : nChw8c;
#elif defined(OV_CPU_WITH_SHL)
const auto targetFormat = nchw;
#else
const auto targetFormat = nhwc;
#endif
Expand Down
9 changes: 6 additions & 3 deletions src/plugins/intel_cpu/tests/functional/utils/riscv64/filter_cpu_info.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -64,9 +64,12 @@ std::vector<CPUSpecificParams> filterCPUInfoForDeviceWithFP16(const std::vector<
}

std::vector<CPUSpecificParams> filterCPUSpecificParams(const std::vector<CPUSpecificParams> &paramsVector) {
static const std::vector<CPUTestUtils::cpu_memory_format_t> supported_f = {CPUTestUtils::cpu_memory_format_t::ncw,
CPUTestUtils::cpu_memory_format_t::nchw,
CPUTestUtils::cpu_memory_format_t::ncdhw};
static const std::vector<CPUTestUtils::cpu_memory_format_t> supported_f = {CPUTestUtils::cpu_memory_format_t::nwc,
CPUTestUtils::cpu_memory_format_t::ncw,
CPUTestUtils::cpu_memory_format_t::nchw,
CPUTestUtils::cpu_memory_format_t::nhwc,
CPUTestUtils::cpu_memory_format_t::ndhwc,
CPUTestUtils::cpu_memory_format_t::ncdhw};
std::vector<CPUSpecificParams> filteredParamsVector = paramsVector;
filteredParamsVector.erase(std::remove_if(filteredParamsVector.begin(),
filteredParamsVector.end(),
Expand Down
Loading