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[CPU] [ARM64] jit emitter pipeline fix #23387
[CPU] [ARM64] jit emitter pipeline fix #23387
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push_arg_entry_of("exp_pol5", 0x3c07cfce, true); | ||
} | ||
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std::set<std::vector<element::Type>> jit_exp_emitter::get_supported_precisions(const std::shared_ptr<ov::Node>& node) { |
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Just detail
std::set<std::vector<element::Type>> jit_exp_emitter::get_supported_precisions(const std::shared_ptr<ov::Node>& node) { | |
std::set<element::TypeVector> jit_exp_emitter::get_supported_precisions(const std::shared_ptr<ov::Node>& node) { |
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@xuchen-intel Please review the changes |
src/plugins/intel_cpu/src/emitters/plugin/aarch64/jit_emitter.cpp
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src/plugins/intel_cpu/src/emitters/plugin/aarch64/jit_emitter.cpp
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size_t _idx = end_gpr_idx - gpr_idx; // we allocate from the end | ||
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if (aux_gpr_idxs.size() >= get_aux_gprs_count()) break; | ||
if ((_idx == Xbyak_aarch64::Operand::X18) || |
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Could you please clarify why these registers cannot bu used? Worth to add comment with the description. CAn be done in separate PR
### Details: - *[CPU] [ARM64] jit emitter pipeline fix*
### Details: - *[CPU] [ARM64] jit emitter pipeline fix*
Details: