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Issue #965 correction #966

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Mar 25, 2024
Merged

Issue #965 correction #966

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12 changes: 6 additions & 6 deletions rtl/cv32e40p_core.sv
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Original file line number Diff line number Diff line change
Expand Up @@ -70,7 +70,8 @@ module cv32e40p_core
output logic [31:0] data_wdata_o,
input logic [31:0] data_rdata_i,

// apu-interconnect
// CVFPU interface
output logic apu_busy_o,
// handshake signals
output logic apu_req_o,
input logic apu_gnt_i,
Expand Down Expand Up @@ -163,7 +164,6 @@ module cv32e40p_core
logic ctrl_busy;
logic if_busy;
logic lsu_busy;
logic apu_busy;

logic [31:0] pc_ex; // PC of last executed branch or cv.elw

Expand Down Expand Up @@ -399,7 +399,7 @@ module cv32e40p_core
.if_busy_i (if_busy),
.ctrl_busy_i(ctrl_busy),
.lsu_busy_i (lsu_busy),
.apu_busy_i (apu_busy),
.apu_busy_i (apu_busy_o),

// PULP cluster
.pulp_clock_en_i (pulp_clock_en_i),
Expand Down Expand Up @@ -634,7 +634,7 @@ module cv32e40p_core
.apu_write_regs_valid_o (apu_write_regs_valid),
.apu_write_dep_i (apu_write_dep),
.apu_perf_dep_o (perf_apu_dep),
.apu_busy_i (apu_busy),
.apu_busy_i (apu_busy_o),

// CSR ID/EX
.csr_access_ex_o (csr_access_ex),
Expand Down Expand Up @@ -818,9 +818,9 @@ module cv32e40p_core
.apu_perf_cont_o(perf_apu_cont),
.apu_perf_wb_o (perf_apu_wb),
.apu_ready_wb_o (apu_ready_wb),
.apu_busy_o (apu_busy),
.apu_busy_o (apu_busy_o),

// apu-interconnect
// CVFPU interface
// handshake signals
.apu_req_o (apu_req_o),
.apu_gnt_i (apu_gnt_i),
Expand Down
14 changes: 10 additions & 4 deletions rtl/cv32e40p_top.sv
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Original file line number Diff line number Diff line change
Expand Up @@ -70,7 +70,7 @@ module cv32e40p_top #(
import cv32e40p_apu_core_pkg::*;

// Core to FPU
logic clk;
logic apu_busy;
logic apu_req;
logic [ APU_NARGS_CPU-1:0][31:0] apu_operands;
logic [ APU_WOP_CPU-1:0] apu_op;
Expand All @@ -82,6 +82,8 @@ module cv32e40p_top #(
logic [ 31:0] apu_rdata;
logic [APU_NUSFLAGS_CPU-1:0] apu_rflags;

logic apu_clk_en, apu_clk;

// Instantiate the Core
cv32e40p_core #(
.COREV_PULP (COREV_PULP),
Expand Down Expand Up @@ -119,6 +121,7 @@ module cv32e40p_top #(
.data_wdata_o (data_wdata_o),
.data_rdata_i (data_rdata_i),

.apu_busy_o (apu_busy),
.apu_req_o (apu_req),
.apu_gnt_i (apu_gnt),
.apu_operands_o(apu_operands),
Expand All @@ -143,20 +146,23 @@ module cv32e40p_top #(

generate
if (FPU) begin : fpu_gen

assign apu_clk_en = apu_req | apu_busy;

// FPU clock gate
cv32e40p_clock_gate core_clock_gate_i (
.clk_i (clk_i),
.en_i (!core_sleep_o),
.en_i (apu_clk_en),
.scan_cg_en_i(scan_cg_en_i),
.clk_o (clk)
.clk_o (apu_clk)
);

// Instantiate the FPU wrapper
cv32e40p_fp_wrapper #(
.FPU_ADDMUL_LAT(FPU_ADDMUL_LAT),
.FPU_OTHERS_LAT(FPU_OTHERS_LAT)
) fp_wrapper_i (
.clk_i (clk),
.clk_i (apu_clk),
.rst_ni (rst_ni),
.apu_req_i (apu_req),
.apu_gnt_o (apu_gnt),
Expand Down
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