-
Notifications
You must be signed in to change notification settings - Fork 426
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
Docs corrections and clarifications #720
Conversation
Signed-off-by: Pascal Gouedo <[email protected]>
Signed-off-by: Pascal Gouedo <[email protected]>
Signed-off-by: Pascal Gouedo <[email protected]>
Signed-off-by: Pascal Gouedo <[email protected]>
…quality by equivalent to. Signed-off-by: Pascal Gouedo <[email protected]>
Signed-off-by: Pascal Gouedo <[email protected]>
Signed-off-by: Pascal Gouedo <[email protected]>
Signed-off-by: Pascal Gouedo <[email protected]>
Signed-off-by: Pascal Gouedo <[email protected]>
@@ -586,10 +586,10 @@ General ALU Operations | |||
+=================+=========================+========================================================================+ | |||
| **cv.abs** | **rD, rs1** | rD = rs1 < 0 ? –rs1 : rs1 | | |||
+-----------------+-------------------------+------------------------------------------------------------------------+ | |||
| **cv.slet** | **rD, rs1, rs2** | rD = rs1 <= rs2 ? 1 : 0 | | |||
| **cv.slet** | **rD, rs1, rs2** | rD[0] = rs1 <= rs2 ? 1 : 0 | |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Hi @pascalgouedo , I do not agree that writing rd[0] is appropriate, it looks like the bits 31:1 are untouched, instead, they are set to 0, see the ALU result:
https://github.com/openhwgroup/cv32e40p/blob/master/rtl/cv32e40p_alu.sv#L973
I suggest we leave it as it was
| | | Note: Comparison is signed | | ||
+-----------------+-------------------------+------------------------------------------------------------------------+ | ||
| **cv.sletu** | **rD, rs1, rs2** | rD = rs1 <= rs2 ? 1 : 0 | | ||
| **cv.sletu** | **rD, rs1, rs2** | rD[0] = rs1 <= rs2 ? 1 : 0 | |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
same as above
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Hi @davideschiavone
Yes you are right. I restore previous description for both SLET instructions.
Signed-off-by: Pascal Gouedo <[email protected]>
Taking into account some closed or not complete PR.