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Docs corrections and clarifications #720

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merged 10 commits into from
Sep 12, 2022

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pascalgouedo
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Taking into account some closed or not complete PR.

@pascalgouedo pascalgouedo added the Component:Doc For issues in the Documentation (e.g. for README.md files) label Sep 9, 2022
Pascal Gouedo added 2 commits September 9, 2022 12:03
Signed-off-by: Pascal Gouedo <[email protected]>
@@ -586,10 +586,10 @@ General ALU Operations
+=================+=========================+========================================================================+
| **cv.abs** | **rD, rs1** | rD = rs1 < 0 ? –rs1 : rs1 |
+-----------------+-------------------------+------------------------------------------------------------------------+
| **cv.slet** | **rD, rs1, rs2** | rD = rs1 <= rs2 ? 1 : 0 |
| **cv.slet** | **rD, rs1, rs2** | rD[0] = rs1 <= rs2 ? 1 : 0 |
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Hi @pascalgouedo , I do not agree that writing rd[0] is appropriate, it looks like the bits 31:1 are untouched, instead, they are set to 0, see the ALU result:

https://github.com/openhwgroup/cv32e40p/blob/master/rtl/cv32e40p_alu.sv#L973

I suggest we leave it as it was

| | | Note: Comparison is signed |
+-----------------+-------------------------+------------------------------------------------------------------------+
| **cv.sletu** | **rD, rs1, rs2** | rD = rs1 <= rs2 ? 1 : 0 |
| **cv.sletu** | **rD, rs1, rs2** | rD[0] = rs1 <= rs2 ? 1 : 0 |
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same as above

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Hi @davideschiavone
Yes you are right. I restore previous description for both SLET instructions.

@davideschiavone davideschiavone merged commit 90b9041 into openhwgroup:dev Sep 12, 2022
@pascalgouedo pascalgouedo deleted the dev_pgo_doc branch September 12, 2022 06:39
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2 participants