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Update core_id and cluster_id widths everywhere
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atraber committed Apr 21, 2016
1 parent 52a6c20 commit 101ef71
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Showing 2 changed files with 4 additions and 4 deletions.
4 changes: 2 additions & 2 deletions riscv_simchecker.sv
Original file line number Diff line number Diff line change
Expand Up @@ -42,8 +42,8 @@ module riscv_simchecker

input logic fetch_enable,
input logic [31:0] boot_addr,
input logic [4:0] core_id,
input logic [4:0] cluster_id,
input logic [3:0] core_id,
input logic [5:0] cluster_id,

input logic [15:0] instr_compressed,
input logic if_valid,
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4 changes: 2 additions & 2 deletions riscv_tracer.sv
Original file line number Diff line number Diff line change
Expand Up @@ -31,8 +31,8 @@ module riscv_tracer
input logic rst_n,

input logic fetch_enable,
input logic [4:0] core_id,
input logic [4:0] cluster_id,
input logic [3:0] core_id,
input logic [5:0] cluster_id,

input logic [31:0] pc,
input logic [31:0] instr,
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