Add tohost capabilities to cv32e20 environment #2224
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cv32e20/bsp/link.ld
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| @@ -65,6 +65,8 @@ SECTIONS | |||
| KEEP(*(.vectors)); | |||
| } >ram | |||
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| .tohost : { *(.tohost) } >ram | |||
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vendor/elfloader/Makefile
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| # Copyright 2022 OpenHW Group | ||
| # SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1 | ||
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| # Makefile for the CV32E20 "Board Support Package". |
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Hi @MarioOpenHWGroup. This PR now has a couple of conflicts. Can you resolve these? Thanks! |
| @@ -26,6 +26,8 @@ typedef class uvme_cv32e20_vp_sig_writer_seq_c; | |||
| typedef class uvme_cv32e20_vp_status_flags_seq_c; | |||
| typedef class uvme_cv32e20_vp_rand_num_seq_c; | |||
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| import "DPI-C" function longint read_symbol(input string symbol, output longint unsigned address); | |||
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It would be good to have some comments here about the purpose of these DPI functions.
MikeOpenHWGroup
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Nov 28, 2023
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Hi @MarioOpenHWGroup. I resolved the conflicts and conducted another review. I have several comments that we should probably review "in person".
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* cv32e20/bsp/crt0.s: add tohost symbol declaration
* cv32e20/bsp/link.ld: add tohost symbol linking address
* cv32e20/bsp/syscalls.c: add tohost store in the exit function
* cv32e20/env/corev-dv/cv32e20_instr_gen_config.sv: add rule to enforce
not ZERO reg used in the scratch reg. This constraint was already
implemented but not working with vsim
* cv32e20/env/uvme/uvme_cv32e20_env.sv: add mechanism to load symbols
from the binary for the execution exit.
* cv32e20/env/uvme/vseq/uvme_cv32e20_vp_status_flags_seq.sv: Adapt code
to host format ( {exit_value, 1} )
* cv32e40p/env/uvme/uvme_rv32isa_covg_trn.sv: substitute
uvm_objects_utils(begin/end) for a simple uvm_object_utils
* lib/corev-dv/corev_asm_program_gen.sv: delete wfi for locking the core
and add tohost mechanism
* lib/uvm_agents/uvma_obi_memory/src/comps/uvma_obi_memory_mon.sv: vsim
complaining for using passive_mp
* lib/uvm_libs/uvml_sb/uvml_sb_cntxt.sv: delete T_TRN type for event as
it causes vsim to fail simulation
* mk/Common.mk: add compilation for elfloader vendor
* mk/uvmt/vsim.mk: add comilation for elfloader vendor and delete
clean_riscv-dv on each corev-dv generation
* vendor/elfloader/Makefile: add elfloader vendor
* vendor/elfloader/elfloader.cc: add elfloader vendor
* lib/corev-dv/corev_asm_program_gen.sv: delete wfi and add syscall on ecall
* cv32e20/tests/programs/custom/riscv_arithmetic_basic_test_*: change align of trap handler to 8
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Add tohost mechanism instead of the in-house one that we had to end the tests.