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This task is related to #2393. We have determined that VCS versions U-2023.03-SP1 and V-2023.12-1 resolve the issue and functional coverage code constructs such as bins rd[] = {[0:31]} with (fpu_latency == 0); now compile and run as expected.
It was pointed out by @AyoubJalali that ISACOV & CVXIF also have workarounds for these code constructs and we should be able to remove them now that VCS handles the code correctly.
This task will be complete when:
The CVA6 team has standardized on a specific version of VCS, and includes a run-time check to ensure the user is running that version (or newer).
A pull-request to resolve the ISACOV and CVXIF workaround has been merged in.
Note: this task has been labeled cva6, because that is the project that will probably want this task completed first. However, it affects all cores using ISACOV and the CVXIF coverage models from the master branch. (so say "thanks" to the CVA6 team 😄)
The text was updated successfully, but these errors were encountered:
This task is related to #2393. We have determined that VCS versions U-2023.03-SP1 and V-2023.12-1 resolve the issue and functional coverage code constructs such as
bins rd[] = {[0:31]} with (fpu_latency == 0);
now compile and run as expected.It was pointed out by @AyoubJalali that ISACOV & CVXIF also have workarounds for these code constructs and we should be able to remove them now that VCS handles the code correctly.
This task will be complete when:
ISACOV
andCVXIF
workaround has been merged in.Note: this task has been labeled
cva6
, because that is the project that will probably want this task completed first. However, it affects all cores using ISACOV and the CVXIF coverage models from the master branch. (so say "thanks" to the CVA6 team 😄)The text was updated successfully, but these errors were encountered: