Merge branch 'main' into philippb.refactor_torch_to_tosa

docs/Dialects/krnl.md

@@ -939,6 +939,12 @@ Traits: MemRefsNormalizable
 Print a tensor.
 
 This operation can be used to generate a call to a runtime function which prints a tensor.
+At the begining of the msg string, user can add formatting instructions. The flags are:
+  %s: detailed signature (including shape, type, offsets),
+  %t: compact type (ala MLIR: 32x16xfloat),
+  %d: data values.
+When no formatting is provided, "%s%d" is used (detailed signature and data) by default.
+Print operation ends with a newline, except when only requesting a compact types (%t).
 
 Traits: MemRefsNormalizable
 

docs/Dialects/zhigh.md

@@ -79,6 +79,37 @@ Effects: MemoryEffects::Effect{}
 | :----: | ----------- |
 | `output` | unranked.tensor of 32-bit float values or 4D tensor of 32-bit float values with layout NHWC
 
+### `zhigh.Concat` (::onnx_mlir::zhigh::ZHighConcatOp)
+
+ZHigh Concat operation to concatenate stickified tensors
+
+"Concatenate a list of tensors into a single tensor. All input tensors must"
+"have the same shape, except for the dimension size of the axis"
+"to concatenate on. Users must ensure that it is safe to concatenate"
+"stickified tensors for the given axis."
+
+Interfaces: NoSideEffect (MemoryEffectOpInterface), ShapeInference
+
+Effects: MemoryEffects::Effect{}
+
+#### Attributes:
+
+| Attribute | MLIR Type | Description |
+| :-------: | :-------: | ----------- |
+| `axis` | ::mlir::IntegerAttr | 64-bit signed integer attribute
+
+#### Operands:
+
+| Operand | Description |
+| :-----: | ----------- |
+| `inputs` | unranked.tensor of 32-bit float values or 4D tensor of 32-bit float values with layout _4D or unranked.tensor of 32-bit float values or 4D tensor of 32-bit float values with layout NHWC or memref of any type values
+
+#### Results:
+
+| Result | Description |
+| :----: | ----------- |
+| `concat_result` | unranked.tensor of 32-bit float values or 4D tensor of 32-bit float values with layout _4D or unranked.tensor of 32-bit float values or 4D tensor of 32-bit float values with layout NHWC or memref of any type values
+
 ### `zhigh.Conv2D` (::onnx_mlir::zhigh::ZHighConv2DOp)
 
 ZHigh 2D convolution operation

docs/Dialects/zlow.md

@@ -141,6 +141,27 @@ Traits: MemRefsNormalizable
 | `shape` | memref of 64-bit signless integer values
 | `Out` | memref of any type values
 
+### `zlow.dummy` (::onnx_mlir::zlow::ZLowDummyOp)
+
+ZLow dummy operation that behaves like identity
+
+"ZLow operation to forward the input value to the output value."
+"It will be removed if canonicalization is called."
+
+Traits: MemRefsNormalizable
+
+#### Operands:
+
+| Operand | Description |
+| :-----: | ----------- |
+| `input` | memref of any type values
+
+#### Results:
+
+| Result | Description |
+| :----: | ----------- |
+| `output` | memref of any type values
+
 ### `zlow.exp` (::onnx_mlir::zlow::ZLowExpOp)
 
 ZLow exp operation
@@ -177,6 +198,7 @@ ZLow gru operation
 "  - 5th item: hiddenSize"
 "direction accepts "forward", "reverse", or "bidirectional"
 "return_all_steps: -1 returns all timesteps, 0: returns only the last timestep.
+"prev_layer for where input comes is "none", "uni", or "bidir"
 
 Traits: MemRefsNormalizable
 
@@ -186,6 +208,7 @@ Traits: MemRefsNormalizable
 | :-------: | :-------: | ----------- |
 | `direction` | ::mlir::StringAttr | string attribute
 | `return_all_steps` | ::mlir::IntegerAttr | 64-bit signed integer attribute
+| `prev_layer` | ::mlir::StringAttr | string attribute
 
 #### Operands:
 
@@ -215,6 +238,7 @@ ZLow lstm operation
 "  - 5th item: hiddenSize"
 "direction accepts "forward", "reverse", or "bidirectional"
 "return_all_steps: -1 returns all timesteps, 0: returns only the last timestep.
+"prev_layer for where input comes is "none", "uni", or "bidir"
 
 Traits: MemRefsNormalizable
 
@@ -224,6 +248,7 @@ Traits: MemRefsNormalizable
 | :-------: | :-------: | ----------- |
 | `direction` | ::mlir::StringAttr | string attribute
 | `return_all_steps` | ::mlir::IntegerAttr | 64-bit signed integer attribute
+| `prev_layer` | ::mlir::StringAttr | string attribute
 
 #### Operands:
 
@@ -505,6 +530,12 @@ ZLow stick operation for GRU
 
 Traits: MemRefsNormalizable
 
+#### Attributes:
+
+| Attribute | MLIR Type | Description |
+| :-------: | :-------: | ----------- |
+| `prev_layer` | ::mlir::StringAttr | string attribute
+
 #### Operands:
 
 | Operand | Description |
@@ -524,6 +555,12 @@ ZLow stick operation for LSTM
 
 Traits: MemRefsNormalizable
 
+#### Attributes:
+
+| Attribute | MLIR Type | Description |
+| :-------: | :-------: | ----------- |
+| `prev_layer` | ::mlir::StringAttr | string attribute
+
 #### Operands:
 
 | Operand | Description |

src/Accelerators/NNPA/Compiler/NNPACompilerUtils.cpp

@@ -138,7 +138,8 @@ void addPassesNNPA(mlir::OwningOpRef<mlir::ModuleOp> &module,
         optLevel = OptLevel::O2;
       else if (optStr == "-O3")
         optLevel = OptLevel::O3;
-      addONNXToKrnlPasses(pm, optLevel);
+      addONNXToKrnlPasses(
+          pm, optLevel, /*enableCSE*/ true, instrumentONNXSignature);
 
       if (nnpaEmissionTarget >= EmitZLowIR)
         emissionTarget = EmitMLIR;

src/Accelerators/NNPA/Conversion/ONNXToZHigh/ONNXLegalityCheck.cpp

@@ -829,7 +829,6 @@ bool isSuitableForZDNN<ONNXConvOp>(ONNXConvOp op) {
           [](IndexExpr val) { return !val.isLiteral(); }))
     return false;
 
-  int64_t inputShapeC = shapeInput[1];
   int64_t inputShapeH = shapeInput[2];
   int64_t inputShapeW = shapeInput[3];
   int64_t outputShapeH = shapeOutput[2];
@@ -849,12 +848,6 @@ bool isSuitableForZDNN<ONNXConvOp>(ONNXConvOp op) {
   if (!isWOK)
     return false;
 
-  // Currently disable the generation of Conv2D when parameters are C != 1, kH =
-  // 1, kW=1 because of current issue #1517.  When fixed, please remove lit test
-  // test_onnx_conv2d_not_lowered_c_not_1_kernel11.
-  if (inputShapeC != 1 && kernelShapeH == 1 && kernelShapeW == 1)
-    return false;
-
   return true;
 }
 

src/Compiler/CompilerOptions.cpp

@@ -147,6 +147,10 @@ llvm::cl::bits<InstrumentActions> instrumentControlBits(
             InstrumentReportMemory, "instrument runtime reports memory usage")),
     llvm::cl::cat(OnnxMlirOptions));
 
+llvm::cl::opt<bool> instrumentONNXSignature("instrument-onnx-signature",
+    llvm::cl::desc("Instrument ONNX ops to print the type of their inputs"),
+    llvm::cl::init(false), llvm::cl::cat(OnnxMlirOptions));
+
 llvm::cl::opt<bool> enableMemoryBundling("enable-memory-bundling",
     llvm::cl::desc(
         "Enable memory bundling related optimizations (default=false)\n"

src/Compiler/CompilerOptions.hpp

@@ -50,6 +50,7 @@ extern llvm::cl::opt<bool> verifyInputTensors;
 
 extern llvm::cl::opt<std::string> instrumentONNXOps;
 extern llvm::cl::bits<InstrumentActions> instrumentControlBits;
+extern llvm::cl::opt<bool> instrumentONNXSignature;
 extern llvm::cl::opt<bool> enableMemoryBundling;
 extern llvm::cl::opt<int> onnxOpTransformThreshold;
 extern llvm::cl::opt<bool> onnxOpTransformReport;

src/Compiler/CompilerPasses.cpp

@@ -69,7 +69,8 @@ void addONNXToMLIRPasses(mlir::PassManager &pm) {
   pm.addPass(mlir::createSymbolDCEPass());
 }
 
-void addONNXToKrnlPasses(mlir::PassManager &pm, int optLevel, bool enableCSE) {
+void addONNXToKrnlPasses(mlir::PassManager &pm, int optLevel, bool enableCSE,
+    bool enableInstrumentONNXSignature) {
   if (enableCSE)
     // Eliminate common sub-expressions before lowering to Krnl.
     // TODO: enable this by default when we make sure it works flawlessly.
@@ -79,6 +80,9 @@ void addONNXToKrnlPasses(mlir::PassManager &pm, int optLevel, bool enableCSE) {
   // Add instrumentation for Onnx Ops
   pm.addNestedPass<func::FuncOp>(onnx_mlir::createInstrumentONNXPass(
       instrumentONNXOps, instrumentControlBits.getBits()));
+  if (enableInstrumentONNXSignature)
+    pm.addNestedPass<func::FuncOp>(
+        onnx_mlir::createInstrumentONNXSignaturePass());
   pm.addPass(onnx_mlir::createLowerToKrnlPass(optLevel));
   // An additional pass of canonicalization is helpful because lowering
   // from ONNX dialect to Standard dialect exposes additional canonicalization
@@ -162,7 +166,8 @@ void addPasses(mlir::OwningOpRef<ModuleOp> &module, mlir::PassManager &pm,
 
   if (emissionTarget >= EmitMLIR) {
     if (inputIRLevel <= ONNXLevel)
-      addONNXToKrnlPasses(pm, OptimizationLevel);
+      addONNXToKrnlPasses(
+          pm, OptimizationLevel, /*enableCSE*/ true, instrumentONNXSignature);
     if (inputIRLevel <= MLIRLevel)
       addKrnlToAffinePasses(pm);
   }

src/Compiler/CompilerPasses.hpp

@@ -17,8 +17,8 @@
 
 namespace onnx_mlir {
 void addONNXToMLIRPasses(mlir::PassManager &pm);
-void addONNXToKrnlPasses(
-    mlir::PassManager &pm, int optLevel, bool enableCSE = true);
+void addONNXToKrnlPasses(mlir::PassManager &pm, int optLevel, bool enableCSE,
+    bool enableInstrumentONNXSignature);
 void addKrnlToAffinePasses(mlir::PassManager &pm);
 void addKrnlToLLVMPasses(
     mlir::OpPassManager &pm, bool enableCSE, bool verifyInputTensors);

src/Conversion/ONNXToKrnl/CMakeLists.txt

@@ -34,9 +34,10 @@ add_onnx_mlir_library(OMONNXToKrnl
   Sequence/SequenceErase.cpp
   Sequence/SequenceInsert.cpp
   Sequence/SequenceLength.cpp
+  ConvertONNXToKrnl.cpp
   Tensor/ArgMax.cpp
-  Tensor/Concat.cpp
   Tensor/Compress.cpp  
+  Tensor/Concat.cpp
   Tensor/Constant.cpp
   Tensor/ConstantOfShape.cpp
   Tensor/DepthToSpace.cpp
@@ -49,22 +50,22 @@ add_onnx_mlir_library(OMONNXToKrnl
   Tensor/NonZero.cpp
   Tensor/OneHot.cpp  
   Tensor/Pad.cpp
+  Tensor/PrintSignature.cpp
+  Tensor/Range.cpp
+  Tensor/Reshape.cpp
+  Tensor/Resize.cpp
+  Tensor/ReverseSequence.cpp
   Tensor/ScatterElements.cpp
   Tensor/ScatterND.cpp  
-  Tensor/Squeeze.cpp
-  Tensor/Split.cpp
   Tensor/Shape.cpp
   Tensor/Size.cpp 
   Tensor/Slice.cpp
   Tensor/SpaceToDepth.cpp
-  Tensor/Reshape.cpp
+  Tensor/Split.cpp
+  Tensor/Squeeze.cpp
   Tensor/Tile.cpp
   Tensor/Transpose.cpp
   Tensor/Unsqueeze.cpp
-  Tensor/Range.cpp
-  Tensor/Resize.cpp
-  Tensor/ReverseSequence.cpp
-  ConvertONNXToKrnl.cpp
 
   LINK_LIBS PUBLIC
   Accelerator

src/Conversion/ONNXToKrnl/ConvertONNXToKrnl.cpp

@@ -230,6 +230,7 @@ void populateONNXToKrnlConversionPattern(RewritePatternSet &patterns,
   populateLoweringONNXExpandOpPattern(patterns, typeConverter, ctx);
   populateLoweringONNXOneHotOpPattern(patterns, typeConverter, ctx);
   populateLoweringONNXCompressOpPattern(patterns, typeConverter, ctx);
+  populateLoweringONNXPrintSignaturePattern(patterns, typeConverter, ctx);
   // Neural network
   populateLoweringONNXConvOpPattern(patterns, typeConverter, ctx);
   populateLoweringONNXNormalizationOpPattern(patterns, typeConverter, ctx);

src/Conversion/ONNXToKrnl/ONNXToKrnlCommon.hpp

@@ -376,6 +376,8 @@ void populateLoweringONNXOneHotOpPattern(
     RewritePatternSet &, TypeConverter &, MLIRContext *);
 void populateLoweringONNXCompressOpPattern(
     RewritePatternSet &, TypeConverter &, MLIRContext *);
+void populateLoweringONNXPrintSignaturePattern(
+    RewritePatternSet &, TypeConverter &, MLIRContext *);
 
 bool checkOpResultIsUsedByGetRef(memref::AllocOp *allocOp);
 

src/Conversion/ONNXToKrnl/Tensor/PrintSignature.cpp

@@ -0,0 +1,55 @@
+/*
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+//===---------------- Concat.cpp - Lowering Concat Op -------------------===//
+//
+// Copyright 2019-2022 The IBM Research Authors.
+//
+// =============================================================================
+//
+// This file lowers the ONNX Print Signature Operator to Krnl dialect.
+//
+//===----------------------------------------------------------------------===//
+
+#include "src/Conversion/ONNXToKrnl/ONNXToKrnlCommon.hpp"
+#include "src/Dialect/Krnl/KrnlHelper.hpp"
+#include "src/Dialect/ONNX/ShapeInference/ONNXShapeHelper.hpp"
+
+using namespace mlir;
+
+namespace onnx_mlir {
+
+struct ONNXPrintSignatureLowering : public ConversionPattern {
+  ONNXPrintSignatureLowering(TypeConverter &typeConverter, MLIRContext *ctx)
+      : ConversionPattern(
+            typeConverter, ONNXPrintSignatureOp::getOperationName(), 1, ctx) {}
+
+  LogicalResult matchAndRewrite(Operation *op, ArrayRef<Value> operands,
+      ConversionPatternRewriter &rewriter) const final {
+    // Gather info.
+    auto loc = op->getLoc();
+    MultiDialectBuilder<KrnlBuilder> create(rewriter, loc);
+    ONNXPrintSignatureOp printSignatureOp =
+        llvm::dyn_cast<ONNXPrintSignatureOp>(op);
+    ONNXPrintSignatureOpAdaptor operandAdaptor(operands);
+
+    std::string opName(printSignatureOp.op_name().data());
+    std::string msg = opName;
+    create.krnl.printf(msg);
+    for (Value oper : operandAdaptor.input()) {
+      msg = "%t ";
+      create.krnl.printTensor(msg, oper);
+    }
+    Value noneValue;
+    rewriter.replaceOpWithNewOp<KrnlPrintOp>(op, "\n", noneValue);
+    return success();
+  }
+};
+
+void populateLoweringONNXPrintSignaturePattern(RewritePatternSet &patterns,
+    TypeConverter &typeConverter, MLIRContext *ctx) {
+  patterns.insert<ONNXPrintSignatureLowering>(typeConverter, ctx);
+}
+
+} // namespace onnx_mlir