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Merge pull request #1 from zephyrproject-rtos/main
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Update for rebasing
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andrewnyland authored Nov 7, 2024
2 parents 4bb9453 + 2b5ee0c commit 6aa9f1d
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Showing 270 changed files with 5,881 additions and 1,210 deletions.
2 changes: 1 addition & 1 deletion .github/workflows/codecov.yaml
Original file line number Diff line number Diff line change
Expand Up @@ -34,7 +34,7 @@ jobs:
CCACHE_REMOTE_STORAGE: "redis://cache-*.keydb-cache.svc.cluster.local|shards=1,2,3"
CCACHE_REMOTE_ONLY: "true"
# `--specs` is ignored because ccache is unable to resovle the toolchain specs file path.
CCACHE_IGNOREOPTIONS: '--specs=*'
CCACHE_IGNOREOPTIONS: '-specs=* --specs=*'
steps:
- name: Apply container owner mismatch workaround
run: |
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2 changes: 1 addition & 1 deletion .github/workflows/twister.yaml
Original file line number Diff line number Diff line change
Expand Up @@ -142,7 +142,7 @@ jobs:
CCACHE_REMOTE_STORAGE: "redis://cache-*.keydb-cache.svc.cluster.local|shards=1,2,3"
CCACHE_REMOTE_ONLY: "true"
# `--specs` is ignored because ccache is unable to resolve the toolchain specs file path.
CCACHE_IGNOREOPTIONS: '--specs=*'
CCACHE_IGNOREOPTIONS: '-specs=* --specs=*'
BSIM_OUT_PATH: /opt/bsim/
BSIM_COMPONENTS_PATH: /opt/bsim/components
TWISTER_COMMON: ' --force-color --inline-logs -v -N -M --retry-failed 3 --timeout-multiplier 2 '
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4 changes: 4 additions & 0 deletions CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -598,6 +598,8 @@ add_custom_command(
COMMAND_EXPAND_LISTS
)
add_custom_target(version_h DEPENDS ${PROJECT_BINARY_DIR}/include/generated/zephyr/version.h)
zephyr_get(KERNEL_VERSION_CUSTOMIZATION SYSBUILD LOCAL)
set_property(TARGET version_h PROPERTY KERNEL_VERSION_CUSTOMIZATION ${KERNEL_VERSION_CUSTOMIZATION})

if(EXISTS ${APPLICATION_SOURCE_DIR}/VERSION)
add_custom_command(
Expand All @@ -616,6 +618,8 @@ if(EXISTS ${APPLICATION_SOURCE_DIR}/VERSION)
app_version_h
DEPENDS ${PROJECT_BINARY_DIR}/include/generated/zephyr/app_version.h)
add_dependencies(zephyr_interface app_version_h)
zephyr_get(APP_VERSION_CUSTOMIZATION SYSBUILD LOCAL)
set_property(TARGET app_version_h PROPERTY APP_VERSION_CUSTOMIZATION ${APP_VERSION_CUSTOMIZATION})
endif()

# Unfortunately, the order in which CMakeLists.txt code is processed
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13 changes: 4 additions & 9 deletions MAINTAINERS.yml
Original file line number Diff line number Diff line change
Expand Up @@ -314,12 +314,13 @@ Bluetooth HCI:
- HoZHel
files:
- include/zephyr/drivers/bluetooth/
- include/zephyr/drivers/bluetooth.h
- drivers/bluetooth/
- samples/bluetooth/hci_*/
- tests/bsim/bluetooth/hci_uart/
- dts/bindings/bluetooth/
labels:
- "area: Bluetooth Host"
- "area: Bluetooth HCI"
- "area: Bluetooth"
tests:
- bluetooth
Expand Down Expand Up @@ -1586,9 +1587,7 @@ Release Notes:
- drivers.i3c

"Drivers: IEEE 802.15.4":
status: maintained
maintainers:
- fgrandel
status: odd fixes
collaborators:
- rlubos
- ankuns
Expand Down Expand Up @@ -2923,8 +2922,6 @@ Networking:
status: maintained
maintainers:
- jukkar
collaborators:
- fgrandel
files:
- doc/connectivity/networking/api/gptp.rst
- include/zephyr/net/gptp.h
Expand Down Expand Up @@ -2996,9 +2993,7 @@ Networking:
- sample.net.ptp

"Networking: Native IEEE 802.15.4":
status: maintained
maintainers:
- fgrandel
status: odd fixes
collaborators:
- rlubos
- jukkar
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2 changes: 0 additions & 2 deletions arch/arm/core/cortex_a_r/prep_c.c
Original file line number Diff line number Diff line change
Expand Up @@ -62,7 +62,6 @@ static inline void z_arm_floating_point_init(void)
__set_CPACR(reg_val);
barrier_isync_fence_full();

#if !defined(CONFIG_FPU_SHARING)
/*
* FPEXC: Floating-Point Exception Control register
* comp. ARM Architecture Reference Manual, ARMv7-A and ARMv7-R edition,
Expand All @@ -84,7 +83,6 @@ static inline void z_arm_floating_point_init(void)
*/
__set_FPEXC(FPEXC_EN);
#endif
#endif
}

#endif /* CONFIG_CPU_HAS_FPU */
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6 changes: 4 additions & 2 deletions arch/arm/core/cortex_a_r/swap_helper.S
Original file line number Diff line number Diff line change
Expand Up @@ -336,12 +336,14 @@ _context_switch:

_oops:
/*
* Pass the exception frame to z_do_kernel_oops. r0 contains the
* exception reason.
* Pass the exception frame to z_do_kernel_oops.
*/
cps #MODE_SYS
mov r0, sp
cps #MODE_SVC
/* Zero callee_regs and exc_return (only used on Cortex-M) */
mov r1, #0
mov r2, #0
bl z_do_kernel_oops
b z_arm_int_exit

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6 changes: 4 additions & 2 deletions arch/arm/core/cortex_a_r/switch.S
Original file line number Diff line number Diff line change
Expand Up @@ -150,10 +150,12 @@ offload:

_oops:
/*
* Pass the exception frame to z_do_kernel_oops. r0 contains the
* exception reason.
* Pass the exception frame to z_do_kernel_oops.
*/
mov r0, sp
/* Zero callee_regs and exc_return (only used on Cortex-M) */
mov r1, #0
mov r2, #0
bl z_do_kernel_oops

inv:
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52 changes: 1 addition & 51 deletions arch/arm/core/cortex_m/fault.c
Original file line number Diff line number Diff line change
Expand Up @@ -40,54 +40,6 @@ LOG_MODULE_DECLARE(os, CONFIG_KERNEL_LOG_LEVEL);
#define EACD(edr) (((edr) & SYSMPU_EDR_EACD_MASK) >> SYSMPU_EDR_EACD_SHIFT)
#endif

/* Exception Return (EXC_RETURN) is provided in LR upon exception entry.
* It is used to perform an exception return and to detect possible state
* transition upon exception.
*/

/* Prefix. Indicates that this is an EXC_RETURN value.
* This field reads as 0b11111111.
*/
#define EXC_RETURN_INDICATOR_PREFIX (0xFF << 24)
/* bit[0]: Exception Secure. The security domain the exception was taken to. */
#define EXC_RETURN_EXCEPTION_SECURE_Pos 0
#define EXC_RETURN_EXCEPTION_SECURE_Msk \
BIT(EXC_RETURN_EXCEPTION_SECURE_Pos)
#define EXC_RETURN_EXCEPTION_SECURE_Non_Secure 0
#define EXC_RETURN_EXCEPTION_SECURE_Secure EXC_RETURN_EXCEPTION_SECURE_Msk
/* bit[2]: Stack Pointer selection. */
#define EXC_RETURN_SPSEL_Pos 2
#define EXC_RETURN_SPSEL_Msk BIT(EXC_RETURN_SPSEL_Pos)
#define EXC_RETURN_SPSEL_MAIN 0
#define EXC_RETURN_SPSEL_PROCESS EXC_RETURN_SPSEL_Msk
/* bit[3]: Mode. Indicates the Mode that was stacked from. */
#define EXC_RETURN_MODE_Pos 3
#define EXC_RETURN_MODE_Msk BIT(EXC_RETURN_MODE_Pos)
#define EXC_RETURN_MODE_HANDLER 0
#define EXC_RETURN_MODE_THREAD EXC_RETURN_MODE_Msk
/* bit[4]: Stack frame type. Indicates whether the stack frame is a standard
* integer only stack frame or an extended floating-point stack frame.
*/
#define EXC_RETURN_STACK_FRAME_TYPE_Pos 4
#define EXC_RETURN_STACK_FRAME_TYPE_Msk BIT(EXC_RETURN_STACK_FRAME_TYPE_Pos)
#define EXC_RETURN_STACK_FRAME_TYPE_EXTENDED 0
#define EXC_RETURN_STACK_FRAME_TYPE_STANDARD EXC_RETURN_STACK_FRAME_TYPE_Msk
/* bit[5]: Default callee register stacking. Indicates whether the default
* stacking rules apply, or whether the callee registers are already on the
* stack.
*/
#define EXC_RETURN_CALLEE_STACK_Pos 5
#define EXC_RETURN_CALLEE_STACK_Msk BIT(EXC_RETURN_CALLEE_STACK_Pos)
#define EXC_RETURN_CALLEE_STACK_SKIPPED 0
#define EXC_RETURN_CALLEE_STACK_DEFAULT EXC_RETURN_CALLEE_STACK_Msk
/* bit[6]: Secure or Non-secure stack. Indicates whether a Secure or
* Non-secure stack is used to restore stack frame on exception return.
*/
#define EXC_RETURN_RETURN_STACK_Pos 6
#define EXC_RETURN_RETURN_STACK_Msk BIT(EXC_RETURN_RETURN_STACK_Pos)
#define EXC_RETURN_RETURN_STACK_Non_Secure 0
#define EXC_RETURN_RETURN_STACK_Secure EXC_RETURN_RETURN_STACK_Msk

/* Integrity signature for an ARMv8-M implementation */
#if defined(CONFIG_ARMV7_M_ARMV8_M_FP)
#define INTEGRITY_SIGNATURE_STD 0xFEFA125BUL
Expand Down Expand Up @@ -1112,9 +1064,7 @@ void z_arm_fault(uint32_t msp, uint32_t psp, uint32_t exc_return,
__ASSERT(esf != NULL,
"ESF could not be retrieved successfully. Shall never occur.");

#ifdef CONFIG_DEBUG_COREDUMP
z_arm_coredump_fault_sp = POINTER_TO_UINT(esf);
#endif
z_arm_set_fault_sp(esf, exc_return);

reason = fault_handle(esf, fault, &recoverable);
if (recoverable) {
Expand Down
1 change: 1 addition & 0 deletions arch/arm/core/cortex_m/swap_helper.S
Original file line number Diff line number Diff line change
Expand Up @@ -447,6 +447,7 @@ _oops:
mov r1, sp /* pointer to _callee_saved_t */
#endif /* CONFIG_ARMV7_M_ARMV8_M_MAINLINE */
#endif /* CONFIG_EXTRA_EXCEPTION_INFO */
mov r2, lr /* EXC_RETURN */
bl z_do_kernel_oops
/* return from SVC exception is done here */
#if defined(CONFIG_EXTRA_EXCEPTION_INFO)
Expand Down
5 changes: 4 additions & 1 deletion arch/arm/core/fatal.c
Original file line number Diff line number Diff line change
Expand Up @@ -101,15 +101,18 @@ void z_arm_fatal_error(unsigned int reason, const struct arch_esf *esf)
*
* @param esf exception frame
* @param callee_regs Callee-saved registers (R4-R11)
* @param exc_return EXC_RETURN value present in LR after exception entry.
*/
void z_do_kernel_oops(const struct arch_esf *esf, _callee_saved_t *callee_regs)
void z_do_kernel_oops(const struct arch_esf *esf, _callee_saved_t *callee_regs, uint32_t exc_return)
{
#if !(defined(CONFIG_EXTRA_EXCEPTION_INFO) && defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE))
ARG_UNUSED(callee_regs);
#endif
/* Stacked R0 holds the exception reason. */
unsigned int reason = esf->basic.r0;

z_arm_set_fault_sp(esf, exc_return);

#if defined(CONFIG_USERSPACE)
if (z_arm_preempted_thread_in_user_mode(esf)) {
/*
Expand Down
9 changes: 9 additions & 0 deletions arch/arm/include/cortex_a_r/exception.h
Original file line number Diff line number Diff line change
Expand Up @@ -43,6 +43,15 @@ static ALWAYS_INLINE bool arch_is_in_nested_exception(const struct arch_esf *esf
return (arch_curr_cpu()->arch.exc_depth > 1U) ? (true) : (false);
}

/**
* @brief No current implementation where core dump is not supported
*
* @param esf exception frame
* @param exc_return EXC_RETURN value present in LR after exception entry.
*/
static ALWAYS_INLINE void z_arm_set_fault_sp(const struct arch_esf *esf, uint32_t exc_return)
{}

#if defined(CONFIG_USERSPACE)
/*
* This function is used by privileged code to determine if the thread
Expand Down
85 changes: 85 additions & 0 deletions arch/arm/include/cortex_m/exception.h
Original file line number Diff line number Diff line change
Expand Up @@ -39,6 +39,54 @@ extern volatile irq_offload_routine_t offload_routine;
*/
#define AIRCR_VECT_KEY_PERMIT_WRITE 0x05FAUL

/* Exception Return (EXC_RETURN) is provided in LR upon exception entry.
* It is used to perform an exception return and to detect possible state
* transition upon exception.
*/

/* Prefix. Indicates that this is an EXC_RETURN value.
* This field reads as 0b11111111.
*/
#define EXC_RETURN_INDICATOR_PREFIX (0xFF << 24)
/* bit[0]: Exception Secure. The security domain the exception was taken to. */
#define EXC_RETURN_EXCEPTION_SECURE_Pos 0
#define EXC_RETURN_EXCEPTION_SECURE_Msk \
BIT(EXC_RETURN_EXCEPTION_SECURE_Pos)
#define EXC_RETURN_EXCEPTION_SECURE_Non_Secure 0
#define EXC_RETURN_EXCEPTION_SECURE_Secure EXC_RETURN_EXCEPTION_SECURE_Msk
/* bit[2]: Stack Pointer selection. */
#define EXC_RETURN_SPSEL_Pos 2
#define EXC_RETURN_SPSEL_Msk BIT(EXC_RETURN_SPSEL_Pos)
#define EXC_RETURN_SPSEL_MAIN 0
#define EXC_RETURN_SPSEL_PROCESS EXC_RETURN_SPSEL_Msk
/* bit[3]: Mode. Indicates the Mode that was stacked from. */
#define EXC_RETURN_MODE_Pos 3
#define EXC_RETURN_MODE_Msk BIT(EXC_RETURN_MODE_Pos)
#define EXC_RETURN_MODE_HANDLER 0
#define EXC_RETURN_MODE_THREAD EXC_RETURN_MODE_Msk
/* bit[4]: Stack frame type. Indicates whether the stack frame is a standard
* integer only stack frame or an extended floating-point stack frame.
*/
#define EXC_RETURN_STACK_FRAME_TYPE_Pos 4
#define EXC_RETURN_STACK_FRAME_TYPE_Msk BIT(EXC_RETURN_STACK_FRAME_TYPE_Pos)
#define EXC_RETURN_STACK_FRAME_TYPE_EXTENDED 0
#define EXC_RETURN_STACK_FRAME_TYPE_STANDARD EXC_RETURN_STACK_FRAME_TYPE_Msk
/* bit[5]: Default callee register stacking. Indicates whether the default
* stacking rules apply, or whether the callee registers are already on the
* stack.
*/
#define EXC_RETURN_CALLEE_STACK_Pos 5
#define EXC_RETURN_CALLEE_STACK_Msk BIT(EXC_RETURN_CALLEE_STACK_Pos)
#define EXC_RETURN_CALLEE_STACK_SKIPPED 0
#define EXC_RETURN_CALLEE_STACK_DEFAULT EXC_RETURN_CALLEE_STACK_Msk
/* bit[6]: Secure or Non-secure stack. Indicates whether a Secure or
* Non-secure stack is used to restore stack frame on exception return.
*/
#define EXC_RETURN_RETURN_STACK_Pos 6
#define EXC_RETURN_RETURN_STACK_Msk BIT(EXC_RETURN_RETURN_STACK_Pos)
#define EXC_RETURN_RETURN_STACK_Non_Secure 0
#define EXC_RETURN_RETURN_STACK_Secure EXC_RETURN_RETURN_STACK_Msk

/*
* The current executing vector is found in the IPSR register. All
* IRQs and system exceptions are considered as interrupt context.
Expand Down Expand Up @@ -184,6 +232,43 @@ static ALWAYS_INLINE void z_arm_clear_faults(void)
#endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE */
}

/**
* @brief Set z_arm_coredump_fault_sp to stack pointer value expected by GDB
*
* @param esf exception frame
* @param exc_return EXC_RETURN value present in LR after exception entry.
*/
static ALWAYS_INLINE void z_arm_set_fault_sp(const struct arch_esf *esf, uint32_t exc_return)
{
#ifdef CONFIG_DEBUG_COREDUMP
z_arm_coredump_fault_sp = POINTER_TO_UINT(esf);
#if defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE) || defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
/* Gdb expects a stack pointer that does not include the exception stack frame in order to
* unwind. So adjust the stack pointer accordingly.
*/
z_arm_coredump_fault_sp += sizeof(esf->basic);

#if defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING)
/* Assess whether thread had been using the FP registers and add size of additional
* registers if necessary
*/
if ((exc_return & EXC_RETURN_STACK_FRAME_TYPE_STANDARD) ==
EXC_RETURN_STACK_FRAME_TYPE_EXTENDED) {
z_arm_coredump_fault_sp += sizeof(esf->fpu);
}
#endif /* CONFIG_FPU && CONFIG_FPU_SHARING */

#ifndef CONFIG_ARMV8_M_MAINLINE
if ((esf->basic.xpsr & SCB_CCR_STKALIGN_Msk) == SCB_CCR_STKALIGN_Msk) {
/* Adjust stack alignment after PSR bit[9] detected */
z_arm_coredump_fault_sp |= 0x4;
}
#endif /* !CONFIG_ARMV8_M_MAINLINE */

#endif /* CONFIG_ARMV7_M_ARMV8_M_MAINLINE || CONFIG_ARMV6_M_ARMV8_M_BASELINE */
#endif /* CONFIG_DEBUG_COREDUMP */
}

/**
* @brief Assess whether a debug monitor event should be treated as an error
*
Expand Down
1 change: 1 addition & 0 deletions arch/common/ramfunc.ld
Original file line number Diff line number Diff line change
Expand Up @@ -9,6 +9,7 @@

SECTION_DATA_PROLOGUE(.ramfunc,,)
{
__ramfunc_region_start = .;
MPU_ALIGN(__ramfunc_size);
__ramfunc_start = .;
*(.ramfunc)
Expand Down
4 changes: 4 additions & 0 deletions arch/mips/core/isr.S
Original file line number Diff line number Diff line change
Expand Up @@ -70,6 +70,7 @@ GTEXT(_Fault)

GTEXT(_k_neg_eagain)
GTEXT(z_thread_mark_switched_in)
GTEXT(z_thread_mark_switched_out)

/* exports */
GTEXT(__isr_vec)
Expand Down Expand Up @@ -209,6 +210,9 @@ on_thread_stack:
#endif /* CONFIG_PREEMPT_ENABLED */

reschedule:
#ifdef CONFIG_INSTRUMENT_THREAD_SWITCHING
jal z_thread_mark_switched_out
#endif
/*
* Check if the current thread is the same as the thread on the ready Q. If
* so, do not reschedule.
Expand Down
1 change: 0 additions & 1 deletion boards/96boards/avenger96/96b_avenger96.yaml
Original file line number Diff line number Diff line change
Expand Up @@ -14,7 +14,6 @@ testing:
- cmsis_rtos_v2
- net
- mpu
- tinycrypt
- crypto
- aes
- cmm
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -72,6 +72,7 @@
mmc {
status = "okay";
compatible = "zephyr,sdmmc-disk";
disk-name = "SD";
};
};
};
Expand Down
1 change: 1 addition & 0 deletions boards/arduino/mkrzero/arduino_mkrzero.dts
Original file line number Diff line number Diff line change
Expand Up @@ -89,6 +89,7 @@
spi-max-frequency = <1000000>;
mmc {
compatible = "zephyr,sdmmc-disk";
disk-name = "SD";
status = "okay";
};
};
Expand Down
1 change: 1 addition & 0 deletions boards/atmel/sam/sam4e_xpro/sam4e_xpro.dts
Original file line number Diff line number Diff line change
Expand Up @@ -219,6 +219,7 @@
pinctrl-names = "default";
mmc {
compatible = "zephyr,sdmmc-disk";
disk-name = "SD";
status = "okay";
};
};
Expand Down
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