dt-bindings: display/msm: hdmi: split and convert to yaml

Convert Qualcomm HDMI binding into HDMI TX and PHY yaml bindings.

Other changes:
 - fixed reg-names numbering to match 0..3 instead 0,1,3,4
 - phy part moved into phy/ directory

Signed-off-by: David Heidelberg <[email protected]>
---
v2:
 - move phy into phy/
 - added maxItems for gpios
 - simplified pinctrl-names
 - dropped some inconsistent quotes

v3:
 - adjusted $id of phy file to the new path from v2

Documentation/devicetree/bindings/display/msm/qcom,hdmi.yaml

@@ -0,0 +1,206 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+
+$id: "http://devicetree.org/schemas/display/msm/qcom,hdmi.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Qualcomm Adreno/Snapdragon HDMI output
+
+maintainers:
+  - Rob Clark <[email protected]>
+
+allOf:
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: qcom,hdmi-tx-8996
+    then:
+      properties:
+        clocks:
+          minItems: 5
+          maxItems: 5
+
+        clock-names:
+          items:
+            - const: mdp_core
+            - const: iface
+            - const: core
+            - const: alt_iface
+            - const: extp
+    else:
+      properties:
+        clocks:
+          minItems: 1
+          maxItems: 5
+
+        clock-names:
+          minItems: 1
+          maxItems: 5
+
+
+properties:
+  compatible:
+    enum:
+      - qcom,hdmi-tx-8996
+      - qcom,hdmi-tx-8994
+      - qcom,hdmi-tx-8084
+      - qcom,hdmi-tx-8974
+      - qcom,hdmi-tx-8660
+      - qcom,hdmi-tx-8960
+
+  clocks: true
+
+  clock-names: true
+
+  reg:
+    minItems: 1
+    maxItems: 3
+    description: Physical base address and length of the controller's registers
+
+  reg-names:
+    minItems: 1
+    items:
+      - const: core_physical
+      - const: qfprom_physical
+      - const: hdcp_physical
+
+  interrupts:
+    maxItems: 1
+    description: The interrupt signal from the hdmi block.
+
+  power-domains:
+    description: should be <&mmcc MDSS_GDSC>
+
+  core-vdda-supply: true
+
+  core-vcc-supply: true
+
+  hdmi-mux-supply:
+    description: phandle to mux regulator
+
+  phys:
+    description: the phandle for the HDMI PHY device
+
+  phy-names:
+    description: the name of the corresponding PHY device
+
+  hpd-gpios:
+    maxItems: 1
+    description: hpd pin
+
+  qcom,hdmi-tx-ddc-clk-gpios:
+    maxItems: 1
+    description: HDMI DDC clock
+
+  qcom,hdmi-tx-ddc-data-gpios:
+    maxItems: 1
+    description: HDMI DDC data
+
+  qcom,hdmi-tx-mux-en-gpios:
+    maxItems: 1
+    description: HDMI mux enable pin
+
+  qcom,hdmi-tx-mux-sel-gpios:
+    maxItems: 1
+    description: HDMI mux select pin
+
+  qcom,hdmi-tx-mux-lpm-gpios:
+    maxItems: 1
+    description: HDMI mux lpm pin
+
+  pinctrl-0: true
+  pinctrl-1: true
+
+  pinctrl-names:
+    minItems: 1
+    items:
+      - const: default
+      - const: sleep
+
+  '#phy-cells':
+    const: 0
+
+  '#sound-dai-cells':
+    const: 1
+
+  ports:
+    type: object
+    $ref: /schemas/graph.yaml#/properties/ports
+    properties:
+      port@0:
+        $ref: /schemas/graph.yaml#/$defs/port-base
+        unevaluatedProperties: false
+        description: |
+          Input endpoints of the controller.
+        properties:
+          endpoint:
+            $ref: /schemas/media/video-interfaces.yaml#
+            unevaluatedProperties: false
+            properties:
+              data-lanes:
+                maxItems: 4
+                minItems: 4
+                items:
+                  enum: [0, 1, 2, 3]
+
+      port@1:
+        $ref: /schemas/graph.yaml#/$defs/port-base
+        unevaluatedProperties: false
+        description: |
+          Output endpoints of the controller.
+        properties:
+          endpoint:
+            $ref: /schemas/media/video-interfaces.yaml#
+            unevaluatedProperties: false
+            properties:
+              data-lanes:
+                maxItems: 4
+                minItems: 4
+                items:
+                  enum: [0, 1, 2, 3]
+
+    required:
+      - port@0
+
+required:
+  - compatible
+  - clocks
+  - clock-names
+  - reg
+  - reg-names
+  - interrupts
+  - phys
+  - phy-names
+
+additionalProperties: false
+
+examples:
+  - |
+    hdmi: hdmi@4a00000 {
+      compatible = "qcom,hdmi-tx-8960";
+      reg-names = "core_physical";
+      reg = <0x04a00000 0x2f0>;
+      interrupts = <0 79 0>;
+      power-domains = <&mmcc 1>;
+      clock-names =
+          "core",
+          "master_iface",
+          "slave_iface";
+      clocks =
+          <&clk 61>,
+          <&clk 72>,
+          <&clk 98>;
+      qcom,hdmi-tx-ddc-clk-gpios = <&msmgpio 70 0>;
+      qcom,hdmi-tx-ddc-data-gpios = <&msmgpio 71 0>;
+      hpd-gpios = <&msmgpio 72 0>;
+      core-vdda-supply = <&pm8921_hdmi_mvs>;
+      hdmi-mux-supply = <&ext_3p3v>;
+      pinctrl-names = "default", "sleep";
+      pinctrl-0 = <&hpd_active  &ddc_active  &cec_active>;
+      pinctrl-1 = <&hpd_suspend &ddc_suspend &cec_suspend>;
+
+      phys = <&hdmi_phy>;
+      phy-names = "hdmi_phy";
+    };