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Nv small #222

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9e5648d
Initial changes for NVDLAv2.
Mar 19, 2018
a9d5034
Fix constraint bug on entry per slice calculation in image input case
Mar 20, 2018
1b47440
fix wrong csc image data read jump control
Mar 20, 2018
4c03371
CMod update for replace by 0 value for garbage data before cvt
Nvidia-DorisLei Mar 20, 2018
e9879f6
fix bug for image post-extention
Mar 20, 2018
471f029
Update resources as singleton, done for CDMA/CC_DP/SDP_RDMA/SDP/PDP, …
Mar 21, 2018
8395fb7
fix image post-extention bugs
Mar 21, 2018
7e0c5d8
testplan: add nv_small_test_list_L20.py to cover all cube size;
Mar 21, 2018
9ce604d
Update run_plan with coverage collection options
Mar 22, 2018
c36a9eb
clr spyglass warning, ongoing
Mar 21, 2018
c60bd6c
Update bank size constraint from hard coded size to define macro
Mar 21, 2018
cc298fc
1. Setup constraint for data/weight full reuse mode
Mar 21, 2018
03e8be6
Done for full reuse update:
Mar 22, 2018
56ab920
Update test coverage db name from 'dummy.cm' to 'test'
Mar 22, 2018
5a5690f
Remove distribution constraints on address
Mar 22, 2018
a218b8f
clean csc spyglass warning
Mar 22, 2018
a3b7f89
run_report.py: fix issue of "NameError: name 'regr_sts_data' is not d…
Mar 22, 2018
5771e2a
clean spyglass warning in cbuf
Mar 22, 2018
c36e3c2
fix yuv format data process bug in cdma
Nvidia-DorisLei Mar 23, 2018
154c71f
clean cmac spyglass warning
Mar 23, 2018
0266ecd
clean cacc spyglass warning
Mar 23, 2018
e2780ec
add support for multiple project and multiple regression status
Mar 22, 2018
953f5e5
fix csc image read jump bug
Mar 23, 2018
0a826a1
cmod cdma update for garbage data process in img format
Nvidia-DorisLei Mar 23, 2018
d72e933
fix csc image read jump control
Mar 23, 2018
e02167f
fix cdma image mismatch
Mar 26, 2018
488b492
add coverage report link to metrics page
Mar 26, 2018
36dc797
fix cacc layer done status report
Nvidia-DorisLei Mar 26, 2018
146a7ae
fix constraint issue
Mar 26, 2018
a169135
fix cover bins issue
Mar 26, 2018
423780a
add macro control for sdp lut coverage sample()
Mar 26, 2018
e60bc3d
gen_coverage_report.py: add new option -gen_report_only and -elfile; …
Mar 26, 2018
33e0aa7
fix cdma no write bug, medium cube size
Mar 26, 2018
e0a3227
fix bit width issue inside csc of data entry calculation logic
Nvidia-DorisLei Mar 27, 2018
fc541d0
Update regression script to support coverage regression
Mar 26, 2018
4c1868a
Add runtime option for coverage collection
Mar 27, 2018
9316592
fix weight read overflow control issue for nv_small_256
Nvidia-DorisLei Mar 27, 2018
0431e16
fix spyglass issue
Mar 27, 2018
baebba9
add urg option to generate coverage report in both txt and html format
Mar 26, 2018
232c9c6
add publish function for coverage data and report
Mar 27, 2018
3598c2a
add en_cov option to run_regression for enable coveage when build tree
Mar 27, 2018
cc6a638
fix width burst calculation issue in img cdma in large cube width mode
Nvidia-DorisLei Mar 28, 2018
4524fe9
fix csc slice super large width bug
Mar 28, 2018
66ed013
Update weight address alignment, always align to 128 bytes
Mar 28, 2018
ffc5571
Update constraint to workaround weight bank size requirement
Mar 28, 2018
ca2fd9a
fix csc address count. incube height too large
Mar 28, 2018
7ec480b
add regression/test status database file merge and publish function t…
Mar 28, 2018
24a6306
Update weight_bytes and wmb_bytes, LSB align to 1 byte
Mar 28, 2018
fc53803
fix conv_x_stride/conv_y_stride constraint issue, which will cause st…
Mar 29, 2018
7e74724
update cdma to fix bit width issue for large cube height in dc mode
Nvidia-DorisLei Mar 29, 2018
74e7d6d
Fix zero divisor error when it's not possible to store atoms from dif…
Mar 29, 2018
44a8877
Fix zero divisor error
Mar 29, 2018
30ca0e5
add macro control for cover bins
Mar 29, 2018
5dc342e
fix image read jump in csc & cbuffer & cdma
Mar 30, 2018
a9dd82c
fix image stripe for cmodel and csc and cacc sram
Mar 30, 2018
d5e9802
add open source license for rams
Mar 30, 2018
8a9219a
update default simulation timeout value from 30 mins to 120 mins; add…
Mar 30, 2018
ae47a54
add 'parallel' option for improve vcs performance
Mar 30, 2018
01edb01
fix image read jump and data shift and cdma
Apr 2, 2018
2b7b75a
fix more cc_pitch cbuf read bug
Apr 2, 2018
416ff53
fix sync_id wait function issue in sequence
Apr 2, 2018
6066e20
Fix memory surface generation bug for YUV format, padding for UV surf…
Apr 2, 2018
2f3875c
fix csc read cbuf shift and csc internal shift control, both y_ext an…
Apr 3, 2018
a1ca7a8
run_report.py: sort by testname when printing report
Apr 3, 2018
a249fea
Fix SDP flying mode setting in CC+SDP+DMA scenario
Apr 3, 2018
782bce8
remove HWACC define in top dir
Apr 3, 2018
4d282e0
remove HWACC
Apr 3, 2018
276d03c
update exclusioon file for nv_small trace_player tb
Apr 3, 2018
31a400c
add macro MEM_ADDR_WIDTH_GT_32 in tb to compile out addr_high cover b…
Apr 3, 2018
5ff3247
1. add new tests to cover max value of cube width/height/channel;
Apr 3, 2018
3f3af47
fix cdma garbage data
Apr 3, 2018
c4105d7
cdma update for yuv data cache before writing into sbuf and bit width…
Nvidia-DorisLei Apr 3, 2018
441dfe2
fix cacc bug
Apr 4, 2018
22ce40d
Add new coverage for padded width alignment for semi-planar format
Apr 4, 2018
10b080d
TMAKE: change the tmake message when detecting a out-of-date tree.make
Apr 4, 2018
59e4564
add pdp corner test for coverage closure
Apr 3, 2018
d1a8f60
add pdp recipt bins wavier
Apr 4, 2018
d615d51
fix 10bits random weight distribution issue
Apr 4, 2018
83f1ec6
fix csc pixel cnt when stripe end and block end met toghther
Apr 4, 2018
658995e
generate failed test list file in run_report.py
Apr 4, 2018
021828f
fix image stride = atomC, read data shift bug
Apr 4, 2018
520e63d
flush fsdb data before simulation abort
Apr 4, 2018
176fda0
fix csc big cube address counting overflow
Apr 4, 2018
85cf6f8
update calculating func/code covearge according to specfic coverage item
Apr 4, 2018
49bc84b
remove the pathname from the include file
Apr 4, 2018
07c600f
recover pixel_w_cnt=csc_entry bug fix
Apr 5, 2018
f675043
cdma udpate for spyglass lint check
Nvidia-DorisLei Apr 4, 2018
b4d6477
clean csc spyglass
Apr 6, 2018
7a82cbf
TMAKE: refine tree.make and cleanme check logic to make it work in a …
Apr 6, 2018
a9e116c
run_coverage_report.py: update to get urg from tree.make
Apr 9, 2018
0a17fcb
check cbuf space before sending dma fetch request for image input
Apr 10, 2018
1d5d8db
update bit width of cdma2sc_dat_slice and sc2cdma_dat_slice from 12bi…
Nvidia-DorisLei Apr 10, 2018
af71794
modify cdma and csc interface slice width
Apr 10, 2018
78f7bb0
add cbuffer bank size por requirement to fix solver timeout sisue
Apr 10, 2018
269ea12
fix cmod interrupt handler issue when two group interrupts trigged in…
Apr 10, 2018
f03a9fa
fix csc spyglass warning
Apr 11, 2018
3da9946
fix csc internal entries_cmp width cut, will fail in extremly large cube
Apr 11, 2018
3041943
update reg group on each reg write
Apr 12, 2018
3da399c
1. Update for CDMA and CSC op_en order dependency on bank change case
Apr 12, 2018
4ff0659
Make sure CSC enable is before CDMA enable
Apr 12, 2018
77e58ca
Record skip_data_rls and skip_weight_rls for reuse case
Apr 12, 2018
4cdb18e
fix csc read image jump continuously
Apr 13, 2018
6eeaa57
Fix surface size calcuation bug for image
Apr 13, 2018
2979ef9
pass ral handle to csb monitor for getting interrupt status register …
Apr 10, 2018
bd9752b
Fix mem size calculation bug for pixel input
Apr 16, 2018
d4e1290
script update:
Apr 16, 2018
91ed447
update scripts to replace ':' with platform-independent os.pathsep
Apr 16, 2018
f0f9888
add run_report function in case no reports generated in regress dir
Apr 17, 2018
043dea1
add script for monitoring lsf jobs status of regression, help to chec…
Apr 18, 2018
af1af47
1. Update TOT/makefile with designware macros
Apr 18, 2018
0212c71
Synthesis update 6
nvdsmith Apr 19, 2018
4492707
weight cdma udpate for weight_bank setting constrain of 8*atmm requir…
Nvidia-DorisLei Mar 26, 2018
f1eb3ee
PDP udpate: surface counter bit width from fixed value to configurabl…
Nvidia-DorisLei Apr 18, 2018
c64599c
start cdma after csc start notification
Apr 19, 2018
c2e15a5
start cdma after csc start notification
Apr 19, 2018
10d34c3
Revert "PDP udpate: surface counter bit width from fixed value to con…
nvdsmith Apr 19, 2018
d2cd765
clean up mcif spyglass
ellenzhangnvdla Apr 20, 2018
ca9d08f
add new corner uvm tests for coverage purpose; update corner tests
Apr 20, 2018
4d69961
update cover bins
Apr 20, 2018
ee2371f
add random width/height/channel solve order
Apr 20, 2018
f0bc59f
check CBUF entry for weight on response rather than on request.
Apr 23, 2018
3d5f48a
fix lsf_monitro match key issue
Apr 19, 2018
17559c3
generate kill_plan.sh for killing lsf bjobs
Apr 20, 2018
a1e7073
fix farm status match issue
Apr 20, 2018
2bd0fdb
fix lsf job exited issue
Apr 23, 2018
41aba8e
add waiver of case statement in mcif/sdp, fix mcif sypglass bit width…
ellenzhangnvdla Apr 23, 2018
011e73d
fix csc read jump address wrap
Apr 23, 2018
9b5d8bb
fix glb of nv_small spyglass issue
Apr 23, 2018
35090d5
SPYGLASS: add swl pre-process
Apr 25, 2018
ac13231
fix duplicated jobid issue when wild charactor in job name
Apr 23, 2018
9a268eb
add spyglass waiver
Apr 25, 2018
464d82a
expand signal width for case selection in cfgrom moduel according to …
Apr 25, 2018
4b15783
coverage closure updates
Apr 25, 2018
02e5616
update conv coverage bins
Apr 28, 2018
4ce5800
Update designware enable flow:
Apr 28, 2018
c1dd6cc
cmod::sdp: bug fix for cc+sdp cases.
Apr 30, 2018
9551b70
update monitor funtion in run_report to refresh regression status in …
May 2, 2018
db05a41
update monitor funtion in run_report to refresh regression status in …
May 2, 2018
a4cc1a9
Update .cleanme to force user to regenerate tree.make
May 7, 2018
1709212
Use designware in CI protection task
May 7, 2018
eba83d0
run_coverage_report.py: add new option '-urg_opts'
May 8, 2018
0e6f7ea
update cover bins
May 8, 2018
577338f
add new corner tests; delete legacy corner tests
May 8, 2018
c2b66f7
Fix output line_pack setting bug
May 9, 2018
1e10fbf
add code coverage waiver files
May 9, 2018
c190eb6
bugfix for sdp cmod.
May 9, 2018
e578bb3
fix cover bin issue
May 10, 2018
8bb251f
run_coverage_report.py: Enable elfile by default; Use json file to lo…
May 10, 2018
1bbcd3b
change eperl::pipe -os to -is in sdp/mcif
ellenzhangnvdla May 11, 2018
db1fc4f
update ::pipe from -os to -is due to potential risk in this pipe option
Nvidia-DorisLei May 11, 2018
7a7fee5
remove redundant line in dc and change un-meaningful instance name in…
Nvidia-DorisLei May 14, 2018
7f357b6
fix bug: missing cfgrom valid from core_response valid source
Nvidia-DorisLei May 15, 2018
3b81761
update run_report
May 16, 2018
c6bbf04
EPERL PLUGIN: remove -os option of pipe
May 15, 2018
c9c2e52
add urg options for generating txt format reports
May 16, 2018
c01236e
update report staus print function
May 17, 2018
b980af3
Add comment print to trace file, print scenario name in layer begin a…
May 17, 2018
e18de04
Merge remote-tracking branch 'gitlab/nvdla_nv_small'
jwise May 17, 2018
905132b
Setup dedicated testplan for regression resource analysis
May 18, 2018
46726e6
bugfix: fixed a potnetial bug in sdp which might leads to memory cor…
May 18, 2018
d055a5d
Remove duplicated analysis port
May 18, 2018
f8ddeba
Add missing SDP DMA scoreboard compare mode control variables
May 18, 2018
45a83c5
Use uvm config field to control connection between RTL monitor and sc…
May 18, 2018
cfe6c67
add nv_small mcif coverage elfile
ellenzhangnvdla May 21, 2018
2dbd024
update cmac and cacc elfile
ellenzhangnvdla May 21, 2018
7ba931c
add lsf queue info recording in regression test .json file
May 21, 2018
f04327d
add scenario name print in trace file
May 21, 2018
903abf0
Update score setting for sdp direct tests
May 22, 2018
558c00a
update lsf monitor match pattern
May 22, 2018
a74eb82
add dmaif mc_pending waiver in sdp, help jian submit csc elfile
ellenzhangnvdla May 25, 2018
51a33df
add nv_ram_rwsp_8x65 ram model and build flow
ellenzhangnvdla May 28, 2018
9a26f68
update metrics system: refresh graph with lastet database; auto load …
May 28, 2018
67f4c0e
Fix internal monitor/scoreboard connection issue
May 31, 2018
46057d5
add verdi_home path env setting to cmd file
Jun 4, 2018
4523b79
update cc reuse mode constraints
Jun 4, 2018
286e520
Initial verision of register accessing
May 25, 2018
d51aa32
Add register accessing test
May 25, 2018
8717dfb
Update test plan, make register accessing test as rtl_only
Jun 5, 2018
e30686a
sdp and cacc register reset value
ellenzhangnvdla Jun 6, 2018
00183f5
fix csc register weight/WMB byte scan bug
Jun 6, 2018
b15c99e
add args for extra options to run_plan command
Jun 7, 2018
e3ccdf5
disable cc resue config in multi-scenarios test
Jun 11, 2018
f08c828
fix image pixel_cnt bug for read jumping
Jun 11, 2018
1428251
add changes required for successful Vivado 2017.4 synthesis (nv_small…
Jun 14, 2018
fabba5f
fix vivado synthesis error, lint modification
Jun 15, 2018
46a2eee
fix spyglass warning for reg-assign
Jun 19, 2018
2becf69
fix rtl for spyglass issue and add waive file for cdma
Jun 19, 2018
771f20c
Merge remote-tracking branch 'gitlab/nvdla_nv_small'
jwise Jun 21, 2018
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3 changes: 3 additions & 0 deletions .cleanme
Original file line number Diff line number Diff line change
@@ -0,0 +1,3 @@
Date:Owner:Reason
11/28/2017:ezhang: initial version for clean build
05/07/2018:penli: Update designware enable defines in tree.make
6 changes: 3 additions & 3 deletions .gitignore
Original file line number Diff line number Diff line change
@@ -1,12 +1,12 @@
*~
*.pyc
*.swp
*.raw2
*.log
*txn.raw
out.txt
verif/sim
!verif/sim/Makefile
!verif/sim/check*.pl
vmod/dw_components/
outdir/
.nvprojectname
tree.make
.cleaned
11 changes: 11 additions & 0 deletions .gitlab-ci.yml
Original file line number Diff line number Diff line change
@@ -0,0 +1,11 @@
before_script:
- export SNPSLMD_LICENSE_FILE="1711@sac-lic-31:1711@sc-lic-32:1711@lic-34:1711@sc-lic-33:1711@sc-lic-14"

stages:
- test

regress:
stage: test
script:
- make USE_VM_ENV=1
- /home/bin/ci_sanity -tot `pwd`
126 changes: 94 additions & 32 deletions Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -7,17 +7,42 @@ TREE_MAKE := tree.make
## _default should always be the first dependency (you can add extra local actions with default::)
##

default: $(TREE_MAKE)
USE_NV_ENV ?= 0
USE_VM_ENV ?= 0

NV_USE_DESIGNWARE ?= 1
NV_DESIGNWARE_DIR ?= /home/tools/synopsys/syn_2011.09/dw/sim_ver
NV_CPP ?= /home/utils/gcc-4.8.2/bin/cpp
NV_GCC ?= /home/utils/gcc-4.8.2/bin/gcc
NV_CXX ?= /home/utils/gcc-4.8.2/bin/g++
NV_PERL ?= /home/utils/perl-5.10/5.10.0-threads-64/bin/perl
NV_JAVA ?= /home/utils/java/jdk1.8.0_131/bin/java
NV_SYSTEMC ?= /home/ip/shared/inf/SystemC/1.0/20151112/systemc-2.3.0/GCC472_64_DBG
NV_PROJ ?= nv_small
NV_PYTHON ?= /home/tools/continuum/Anaconda3-5.0.1/bin/python
NV_VERDI_HOME ?= /home/tools/debussy/verdi3_2016.06-SP2-9
NV_NOVAS_HOME ?= /home/tools/debussy/verdi3_2016.06-SP2-9
NV_VCS_HOME ?= /home/tools/vcs/mx-2016.06-SP2-4
NV_VERILATOR ?= verilator
NV_CLANG ?= /home/utils/llvm-4.0.1/bin/clang

DEFAULT_CPP := /home/utils/gcc-4.9.3/bin/cpp
DEFAULT_GCC := /home/utils/gcc-4.9.3/bin/g++
DEFAULT_PERL := /home/utils/perl-5.8.8/bin/perl
DEFAULT_JAVA := /home/utils/java/jdk1.8.0_131/bin/java
DEFAULT_SYSTEMC := /usr/local/systemc-2.3.0/
DEFAULT_VERILATOR := verilator
DEFAULT_CLANG := clang
DEFAULT_PROJ := nv_full
VM_USE_DESIGNWARE ?= 1
VM_DESIGNWARE_DIR ?= /home/tools/synopsys/syn_2011.09/dw/sim_ver
VM_CPP ?= /usr/local/bin/cpp
VM_GCC ?= /usr/local/bin/gcc
VM_CXX ?= /usr/local/bin/g++
VM_PERL ?= /usr/bin/perl
VM_JAVA ?= /usr/bin/java
VM_SYSTEMC ?= /usr/local/systemc-2.3
VM_PROJ ?= nv_small
VM_PYTHON ?= /home/tools/continuum/Anaconda3-5.0.1/bin/python
VM_VERDI_HOME ?= /home/tools/debussy/verdi3_2016.06-SP2-9
VM_NOVAS_HOME ?= /home/tools/debussy/verdi3_2016.06-SP2-9
VM_VCS_HOME ?= /home/tools/vcs/mx-2016.06-SP2-4
VM_VERILATOR ?= verilator
VM_CLANG ?= /home/utils/llvm-4.0.1/bin/clang

default: $(TREE_MAKE)
$(TREE_MAKE): Makefile
@echo "Creating tree.make to setup your working environment and projects"
@echo "## ================================================================" > $@
Expand All @@ -32,33 +57,70 @@ $(TREE_MAKE): Makefile
@echo "##======================= " >> $@
@echo "## Project Name Setup, multiple projects supported " >> $@
@echo "##======================= " >> $@
@read -p "Enter project names (Press ENTER to use: $(DEFAULT_PROJ)):" opt_proj; if [ "_$$opt_proj" = "_" ]; then echo "PROJECTS := $(DEFAULT_PROJ)" >> $@; else echo "PROJECTS := $$opt_proj" >> $@; fi
@echo "" >> $@
ifeq (1,$(USE_NV_ENV))
@echo "PROJECTS := $(NV_PROJ)" >> $@
else
ifeq (1,$(USE_VM_ENV))
@echo "PROJECTS := $(VM_PROJ)" >> $@
else
@read -p "Enter project names (Press ENTER if use: $(NV_PROJ)):" opt; if [ "_$$opt" = "_" ]; then echo "PROJECTS := $(NV_PROJ)" >> $@; else echo "PROJECTS := $$opt" >> $@; fi
endif
endif
@echo " " >> $@
@echo "##======================= " >> $@
@echo "##Linux Environment Setup " >> $@
@echo "##======================= " >> $@
@echo " " >> $@
@echo "## c pre-processor " >> $@
@read -p "Enter c pre-processor path (Press ENTER to use: $(DEFAULT_CPP)):" opt_cpp; if [ "_$$opt_cpp" = "_" ]; then echo "CPP := $(DEFAULT_CPP)" >> $@; else echo "CPP := $$opt_cpp" >> $@; fi
@echo " " >> $@
@echo "## c++ compiler " >> $@
@read -p "Enter g++ path (Press ENTER to use: $(DEFAULT_GCC)):" opt_gcc; if [ "_$$opt_gcc" = "_" ]; then echo "GCC := $(DEFAULT_GCC)" >> $@; else echo "GCC := $$opt_gcc" >> $@; fi
@echo " " >> $@
@echo "## perl: many scripts is written in perl " >> $@
@read -p "Enter perl path (Press ENTER to use: $(DEFAULT_PERL)):" opt_perl; if [ "_$$opt_perl" = "_" ]; then echo "PERL := $(DEFAULT_PERL)" >> $@; else echo "PERL := $$opt_perl" >> $@; fi
@echo " " >> $@
@echo "## java: used in hardware regester spec compilation (not in current release) " >> $@
@read -p "Enter java path (Press ENTER to use: $(DEFAULT_JAVA)):" opt_java; if [ "_$$opt_java" = "_" ]; then echo "JAVA := $(DEFAULT_JAVA)" >> $@; else echo "JAVA := $$opt_java" >> $@; fi
@echo " " >> $@
@echo "## systemc: needed for Cmodel build (optional) " >> $@
@read -p "Enter systemc path (Press ENTER to use: $(DEFAULT_SYSTEMC)):" opt_systemc; if [ "_$$opt_systemc" = "_" ]; then echo "SYSTEMC := $(DEFAULT_SYSTEMC)" >> $@; else echo "SYSTEMC := $$opt_systemc" >> $@; fi
@echo " " >> $@
@echo "## verilator: used to build testbench without VCS (optional)" >> $@
@read -p "OPTIONAL: Enter verilator path (Press ENTER to use: $(DEFAULT_VERILATOR)):" opt_verilator; if [ "_$$opt_verilator" = "_" ]; then echo "VERILATOR := $(DEFAULT_VERILATOR)" >> $@; else echo "VERILATOR := $$opt_verilator" >> $@; fi
@echo " " >> $@
@echo "## clang: used to build Verilated binaries (optional)" >> $@
@read -p "OPTIONAL: Enter clang path (Press ENTER to use: $(DEFAULT_CLANG)):" opt_clang; if [ "_$$opt_clang" = "_" ]; then echo "CLANG := $(DEFAULT_CLANG)" >> $@; else echo "CLANG := $$opt_clang" >> $@; fi
@echo
ifeq (1,$(USE_NV_ENV))
@echo "USE_DESIGNWARE := $(NV_USE_DESIGNWARE)" >> $@
@echo "DESIGNWARE_DIR := $(NV_DESIGNWARE_DIR)" >> $@
@echo "CPP := $(NV_CPP)" >> $@
@echo "GCC := $(NV_GCC)" >> $@
@echo "CXX := $(NV_CXX)" >> $@
@echo "PERL := $(NV_PERL)" >> $@
@echo "JAVA := $(NV_JAVA)" >> $@
@echo "SYSTEMC := $(NV_SYSTEMC)" >> $@
@echo "PYTHON := $(NV_PYTHON)" >> $@
@echo "VERDI_HOME := $(NV_VERDI_HOME)" >> $@
@echo "NOVAS_HOME := $(NV_NOVAS_HOME)" >> $@
@echo "VCS_HOME := $(NV_VCS_HOME)" >> $@
@echo "CLANG := $(NV_CLANG)" >> $@
@echo "VERILATOR := $(NV_VERILATOR)" >> $@
else
ifeq (1,$(USE_VM_ENV))
@echo "USE_DESIGNWARE := $(VM_USE_DESIGNWARE)" >> $@
@echo "DESIGNWARE_DIR := $(VM_DESIGNWARE_DIR)" >> $@
@echo "CPP := $(VM_CPP)" >> $@
@echo "GCC := $(VM_GCC)" >> $@
@echo "CXX := $(VM_CXX)" >> $@
@echo "PERL := $(VM_PERL)" >> $@
@echo "JAVA := $(VM_JAVA)" >> $@
@echo "SYSTEMC := $(VM_SYSTEMC)" >> $@
@echo "PYTHON := $(VM_PYTHON)" >> $@
@echo "VERDI_HOME := $(VM_VERDI_HOME)" >> $@
@echo "NOVAS_HOME := $(VM_NOVAS_HOME)" >> $@
@echo "VCS_HOME := $(VM_VCS_HOME)" >> $@
@echo "CLANG := $(VM_CLANG)" >> $@
@echo "VERILATOR := $(VM_VERILATOR)" >> $@
else
@read -p "Using designware or not [1 for use/0 for not use] (Press ENTER if use: $(NV_USE_DESIGNWARE)):" opt; if [ "_$$opt" = "_" ]; then echo "USE_DESIGNWARE := $(NV_USE_DESIGNWARE)" >> $@; else echo "USE_DESIGNWARE := $$opt" >> $@; fi
@read -p "Enter design ware path (Press ENTER if use: $(NV_DESIGNWARE_DIR)):" opt; if [ "_$$opt" = "_" ]; then echo "DESIGNWARE_DIR := $(NV_DESIGNWARE_DIR)" >> $@; else echo "DESIGNWARE_DIR := $$opt" >> $@; fi
@read -p "Enter c pre-processor path (Press ENTER if use: $(NV_CPP)):" opt; if [ "_$$opt" = "_" ]; then echo "CPP := $(NV_CPP)" >> $@; else echo "CPP := $$opt" >> $@; fi
@read -p "Enter gcc path (Press ENTER if use: $(NV_GCC)):" opt; if [ "_$$opt" = "_" ]; then echo "GCC := $(NV_GCC)" >> $@; else echo "GCC := $$opt" >> $@; fi
@read -p "Enter g++ path (Press ENTER if use: $(NV_CXX)):" opt; if [ "_$$opt" = "_" ]; then echo "CXX := $(NV_CXX)" >> $@; else echo "CXX := $$opt" >> $@; fi
@read -p "Enter perl path (Press ENTER if use: $(NV_PERL)):" opt; if [ "_$$opt" = "_" ]; then echo "PERL := $(NV_PERL)" >> $@; else echo "PERL := $$opt" >> $@; fi
@read -p "Enter java path (Press ENTER if use: $(NV_JAVA)):" opt; if [ "_$$opt" = "_" ]; then echo "JAVA := $(NV_JAVA)" >> $@; else echo "JAVA := $$opt" >> $@; fi
@read -p "Enter systemc path (Press ENTER if use: $(NV_SYSTEMC)):" opt; if [ "_$$opt" = "_" ]; then echo "SYSTEMC := $(NV_SYSTEMC)" >> $@; else echo "SYSTEMC := $$opt" >> $@; fi
@read -p "Enter python path (Press ENTER if use: $(NV_PYTHON)):" opt; if [ "_$$opt" = "_" ]; then echo "PYTHON := $(NV_PYTHON)" >> $@; else echo "PYTHON := $$opt" >> $@; fi
@read -p "Enter vcs_home path (Press ENTER if use: $(NV_VCS_HOME)):" opt; if [ "_$$opt" = "_" ]; then echo "VCS_HOME := $(NV_VCS_HOME)" >> $@; else echo "VCS_HOME := $$opt" >> $@; fi
@read -p "Enter novas_home path (Press ENTER if use: $(NV_NOVAS_HOME)):" opt; if [ "_$$opt" = "_" ]; then echo "NOVAS_HOME := $(NV_NOVAS_HOME)" >> $@; else echo "NOVAS_HOME := $$opt" >> $@; fi
@read -p "Enter verdi_home path (Press ENTER if use: $(NV_VERDI_HOME)):" opt; if [ "_$$opt" = "_" ]; then echo "VERDI_HOME := $(NV_VERDI_HOME)" >> $@; else echo "VERDI_HOME := $$opt" >> $@; fi
@read -p "OPTIONAL: Enter verilator path (Press ENTER to use: $(NV_VERILATOR)):" opt_verilator; if [ "_$$opt_verilator" = "_" ]; then echo "VERILATOR := $(NV_VERILATOR)" >> $@; else echo "VERILATOR := $$opt_verilator" >> $@; fi
@read -p "OPTIONAL: Enter clang path (Press ENTER to use: $(NV_CLANG)):" opt_clang; if [ "_$$opt_clang" = "_" ]; then echo "CLANG := $(NV_CLANG)" >> $@; else echo "CLANG := $$opt_clang" >> $@; fi
endif
endif
@echo "====================================================================="
@echo "$@ is created successfully, and you can edit $@ manually if necessary"
@echo "====================================================================="

$(TREE_MAKE): Makefile
13 changes: 1 addition & 12 deletions README.md
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
# NVDLA Open Source Hardware, version 1.0
# NVDLA Open Source Hardware
---

## NVDLA
Expand All @@ -10,17 +10,6 @@ Learn more about NVDLA on the project web page.

<http://nvdla.org/>

## About this release

This release, in the `nvdlav1` branch, contains the non-configurable
"full-precision" version of NVDLA. This non-configurable version is fixed
at 2048 8-bit MACs (or 1024 16-bit fixed- or floating-point MACs). This
branch is expected to be a stable sustaining release; although bug fixes may
be added, new RTL feature improvements will not appear in this branch.
Additionally, this branch will diverge from the `master` branch; commits
from that branch may be cherry-picked into this branch, but wholesale merges
from `master` will not appear on `nvdlav1`.

## Online Documentation

NVDLA documentation is located [here](http://nvdla.org/contents.html). Hardware specific
Expand Down
2 changes: 1 addition & 1 deletion VERSION
Original file line number Diff line number Diff line change
@@ -1 +1 @@
NVDLA_OS_INITIAL
NVDLA_2
12 changes: 9 additions & 3 deletions cmod/Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -9,7 +9,8 @@ endif

TARGET ?= libnvdla_cmod.so

BUILD_DIR ?= $(DEPTH)/$(OUTDIR)/$(PROJECT)/$(REL_PATH_FROM_TOT)
PROJECT_DIR ?= $(DEPTH)/$(OUTDIR)/$(PROJECT)
BUILD_DIR ?= $(PROJECT_DIR)/$(REL_PATH_FROM_TOT)
SRC_DIR ?= $(DEPTH)/cmod

PREFIX ?=$(BUILD_DIR)/release
Expand Down Expand Up @@ -50,6 +51,7 @@ SRCS := \
$(SRC_DIR)/hls_wrapper/sdp_hls_wrapper.cpp \
$(SRC_DIR)/mcif/gen/NV_NVDLA_mcif.cpp \
$(SRC_DIR)/nvdla_clibs/NvdlaDataFormatConvertor.cpp \
$(SRC_DIR)/nvdla_clibs/NvdlaPacker.cpp \
$(SRC_DIR)/nvdla_core/NV_NVDLA_core.cpp \
$(SRC_DIR)/nvdla_core/NvdlaCoreDummy.cpp \
$(SRC_DIR)/nvdla_top/NV_nvdla.cpp \
Expand Down Expand Up @@ -100,10 +102,13 @@ OBJS := $(SRCS:%=$(BUILD_DIR)/%.o)
DEPS := $(OBJS:.o=.d)

INC_DIRS := \
$(PROJECT_DIR)/spec/defs \
$(PROJECT_DIR)/spec/manual \
./include \
$(SRC_DIR)/include/nvdla_ness_header \
$(SRC_DIR)/include \
$(SRC_DIR)/nvdla_payload \
$(SRC_DIR)/nvdla_clibs \
$(SRC_DIR)/bdma \
$(SRC_DIR)/cacc \
$(SRC_DIR)/cbuf \
Expand Down Expand Up @@ -154,7 +159,7 @@ CPPFLAGS ?= $(INC_FLAGS) -MMD -MP -fPIC -Wall -Werror -DSC_INCLUDE_DYNAMIC_PROCE
LDFLAGS ?= -shared $(addprefix -l,$($(notdir $(SYSTEMC_LIBRARIES)):lib%.so=%)) $(LD_FLAGS)

$(BUILD_DIR)/$(TARGET): $(OBJS)
$(GCC) $(OBJS) -o $@ $(LDFLAGS) -L$(BUILD_DIR)
$(CC) $(OBJS) -o $@ $(LDFLAGS) -L$(BUILD_DIR)

default: $(BUILD_DIR)/$(TARGET) install
@echo "=============================================="
Expand All @@ -163,7 +168,7 @@ default: $(BUILD_DIR)/$(TARGET) install

$(BUILD_DIR)/%.cpp.o: %.cpp
$(MKDIR_P) $(dir $@)
$(GCC) $(CPPFLAGS) $(CXXFLAGS) -c $< -o $@
$(CXX) $(CPPFLAGS) $(CXXFLAGS) -c $< -o $@

.PHONY: clean

Expand All @@ -179,6 +184,7 @@ install:
$(CP) $(SRC_DIR)/include/scsim_common.h $(PREFIX)/include
$(CP) $(SRC_DIR)/include/NV_nvdla_top_base.h $(PREFIX)/include
$(CP) $(SRC_DIR)/nvdla_top/NV_nvdla.h $(PREFIX)/include
$(CP) $(SRC_DIR)/nvdla_payload/nvdla_dbb_extension.h $(PREFIX)/include
@echo "=============================================="
@echo "release files are installed to $(PREFIX)"
@echo "=============================================="
Expand Down
4 changes: 2 additions & 2 deletions cmod/bdma/BdmaCore.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -10,8 +10,8 @@

#include <algorithm>
#include <iomanip>
#include "arnvdla.uh"
#include "arnvdla.h"
#include "opendla.uh"
#include "opendla.h"
#include "cmacros.uh"
#include "BdmaCore.h"
#include "bdmacoreconfigclass.h"
Expand Down
8 changes: 4 additions & 4 deletions cmod/bdma/BdmaCore.h
Original file line number Diff line number Diff line change
Expand Up @@ -21,10 +21,9 @@
#include <tlm.h>
#include <tlm_utils/multi_passthrough_initiator_socket.h>
#include <tlm_utils/multi_passthrough_target_socket.h>
#include <systemc.h>
// #include "bdmacoreconfigclass.h"

#define BDMA_CONFIG_FIFO_DEPTH 20
#define BDMA_CONFIG_FIFO_DEPTH 40
#define DMA_ATOM_SIZE 32
#define DMA_ATOM_CMOD_ENTRY_GRANULARITY 8
#define BDMA_CORE_DMA_ATOM_FIFO_SIZE 2048
Expand Down Expand Up @@ -81,7 +80,7 @@ class BdmaCore : public sc_module
sc_fifo<uint8_t> *cmd_req_ack;
#endif

sc_fifo <bdma_ack_info *> *bdma_ack_fifo_;
sc_core::sc_fifo <bdma_ack_info *> *bdma_ack_fifo_;

// Configuration ports
sc_port<sc_fifo_in_if<BdmaCoreConfig> > core_config_in;
Expand Down Expand Up @@ -144,11 +143,12 @@ class BdmaCore : public sc_module
sc_core::sc_time dma_delay_;

// FIFO between read response and write request
sc_fifo <DmaAtom> *dma_atom_fifo_;
sc_core::sc_fifo <DmaAtom> *dma_atom_fifo_;
sc_core::sc_fifo <BdmaCoreConfig> *write_config_fifo_;
#if 0
sc_core::sc_fifo <uint8_t> *write_complete_interrupt_ptr_fifo_;
#endif
sc_event reset_event_;

uint32_t src_ram_type_next_;
uint32_t src_ram_type_curr_;
Expand Down
15 changes: 8 additions & 7 deletions cmod/bdma/NV_NVDLA_bdma.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -14,8 +14,8 @@
#include "NV_NVDLA_bdma_bdma_gen.h"
#include "BdmaCore.h"
#include "bdmacoreconfigclass.h"
#include "arnvdla.uh"
#include "arnvdla.h"
#include "opendla.uh"
#include "opendla.h"
#include "cmacros.uh"
#include "math.h"
#include "log.h"
Expand Down Expand Up @@ -63,7 +63,7 @@ NV_NVDLA_bdma::NV_NVDLA_bdma( sc_module_name module_name ):
SC_METHOD(UpdateIdleStatus)
sensitive << core_is_idle;
SC_METHOD(UpdateFreeSlotNum)
sensitive << core_notify_get_config;
sensitive << bdma_core_config_fifo_->data_written_event() << bdma_core_config_fifo_->data_read_event();
SC_METHOD(ClearInt0Flag)
sensitive << bdma2glb_done_intr[0];
SC_METHOD(ClearInt1Flag)
Expand All @@ -83,13 +83,13 @@ void NV_NVDLA_bdma::UpdateIdleStatus() {
void NV_NVDLA_bdma::UpdateFreeSlotNum() {
uint8_t free_slot_num;
free_slot_num = bdma_core_config_fifo_->num_free();
cslDebug((50,"Call bdma_reg_model::BdmaUpdateFreeConfigSlotNum free_slot_num=%d\n", free_slot_num));
bdma_reg_model::BdmaUpdateFreeConfigSlotNum(free_slot_num);
}

#pragma CTC SKIP
NV_NVDLA_bdma::~NV_NVDLA_bdma () {
delete bdma_core_config_fifo_;
delete bdma_core_int_fifo_;
delete bdma_core;
}
#pragma CTC ENDSKIP
Expand Down Expand Up @@ -156,6 +156,7 @@ void NV_NVDLA_bdma::OperationEnableTriggerThread() {
BdmaCoreConfig bdma_config;
while (true) {
wait(operation_enable_event_);
cout << "after wait operation_enable_event_" << endl;
// Copy data from bdma_config_class to bdma_config
bdma_config.cfg_src_addr_low_v32_ = bdma_config_class->cfg_src_addr_low_v32_;
bdma_config.cfg_src_addr_high_v8_ = bdma_config_class->cfg_src_addr_high_v8_;
Expand All @@ -173,11 +174,11 @@ void NV_NVDLA_bdma::OperationEnableTriggerThread() {
bdma_config.cfg_launch0_grp0_launch_ = 0;
bdma_config.cfg_launch1_grp1_launch_ = 0;
bdma_core_config_fifo_->write(bdma_config);
//op_count++;
bdma_reg_model::BdmaClearOperationEnable();
operation_enable_clr_event_.notify();
cout << "after write to bdma_core_config_fifo_" << endl;
//bdma_reg_model::BdmaClearOperationEnable();
}
}

#pragma CTC SKIP
void NV_NVDLA_bdma::mcif2bdma_rd_rsp_b_transport(int ID, nvdla_dma_rd_rsp_t* payload, sc_core::sc_time& delay){
}
Expand Down
2 changes: 1 addition & 1 deletion cmod/bdma/NV_NVDLA_bdma.h
Original file line number Diff line number Diff line change
Expand Up @@ -24,7 +24,7 @@
// #include "BdmaCore.h"


#define BDMA_CONFIG_FIFO_DEPTH NVDLA_BDMA_STATUS_0_FREE_SLOT_DEFAULT // Defined as 0x14 in spec
#define BDMA_CONFIG_FIFO_DEPTH (2*NVDLA_BDMA_STATUS_0_FREE_SLOT_DEFAULT) // Defined as 0x14 in spec
#define MAX_MEM_TRANSACTION_SIZE 256
#define MEM_TRANSACTION_ATOM_SIZE 32

Expand Down
3 changes: 1 addition & 2 deletions cmod/bdma/gen/NV_NVDLA_bdma_bdma_gen.h
Original file line number Diff line number Diff line change
Expand Up @@ -9,10 +9,9 @@
// File Name: NV_NVDLA_bdma_bdma_gen.h

#include "NV_NVDLA_bdma.h"
#include "log.h"
#define __STDC_FORMAT_MACROS
#include <inttypes.h>
#include "log.h"


USING_SCSIM_NAMESPACE(cmod)
USING_SCSIM_NAMESPACE(clib)
Expand Down
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