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fix: support for conditional stores #2553

Merged
merged 13 commits into from
Sep 13, 2023
Merged

fix: support for conditional stores #2553

merged 13 commits into from
Sep 13, 2023

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guipublic
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Description

Problem*

Resolves #2493

Summary*

Array Set with side-effect context are replaced by predicate*value+(1-predicate)array read
The index of array operation is also replaced by predicate
index.

This strategy does not work with empty slice since we would access index 0 and that would still fail with an empty slice, but I believe this case is degenerate enough to not support it.

Documentation

  • This PR requires documentation updates when merged.

    • I will submit a noir-lang/docs PR.
    • I will request for and support Dev Rel's help in documenting this PR.

Additional Context

The PR requires ACVM PR 524 for the CI tests to pass.

PR Checklist*

  • I have tested the changes locally.
  • I have formatted the changes with Prettier and/or cargo fmt on default settings.

@vezenovm
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vezenovm commented Sep 5, 2023

This looks to be failing with the same bug I have here (#2446). I'm working on a fix as I think I may know the issue.

@vezenovm
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vezenovm commented Sep 5, 2023

The failing test should pass now if you pull master.

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@vezenovm vezenovm left a comment

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Could we add a test like below to array_dynamic where idx is greater than the length of x?

fn regression_mem_op_predicate(mut x: [u32; 5], idx: Field) {
  // We should not hit out of bounds here as we have a predicate
  // that should not be hit
  if idx as u32 < 3 {    
    x[idx] = 10;
  }
  assert(x[4] == 111);
}

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Just some comments suggestions mainly, but none are blocking for getting this out

crates/noirc_evaluator/src/ssa/acir_gen/mod.rs Outdated Show resolved Hide resolved
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crates/noirc_evaluator/src/ssa/acir_gen/mod.rs Outdated Show resolved Hide resolved
crates/noirc_evaluator/src/ssa/acir_gen/mod.rs Outdated Show resolved Hide resolved
crates/noirc_evaluator/src/ssa/acir_gen/mod.rs Outdated Show resolved Hide resolved
@jfecher
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jfecher commented Sep 7, 2023

LGTM. We can merge once merge conflicts are fixed

vezenovm
vezenovm previously approved these changes Sep 13, 2023
compiler/noirc_evaluator/src/ssa/acir_gen/mod.rs Outdated Show resolved Hide resolved
compiler/noirc_evaluator/src/ssa/acir_gen/mod.rs Outdated Show resolved Hide resolved
@kevaundray kevaundray added this pull request to the merge queue Sep 13, 2023
Merged via the queue into master with commit 6e6d952 Sep 13, 2023
15 checks passed
@kevaundray kevaundray deleted the gd/issue_2493 branch September 13, 2023 16:36
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Encode MemoryOp predicates in circuit
4 participants