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libresoc: move into packages defined in by-name
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Signed-off-by: Jack Leightcap <[email protected]>
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jleightcap authored and albertchae committed Apr 26, 2024
1 parent 4cf5667 commit 33866b0
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56 changes: 56 additions & 0 deletions pkgs/by-name/libresoc/package.nix
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{callPackage}: let
# JTAG debugging
libresoc-c4m-jtag = callPackage ./libresoc-c4m-jtag.nix {inherit nmigen nmigen-soc;};
# floating point implementation
libresoc-ieee754fpu = callPackage ./ieee754fpu.nix {inherit nmutil nmigen pytest-output-to-files;};
# openpower-isa definition
libresoc-openpower-isa = callPackage ./openpower-isa.nix {
inherit
libresoc-pyelftools
mdis
nmigen
nmutil
pytest-output-to-files
;
};
# libresoc's fork of pyelftools, few commits have diverged from pyelftools packaged by nixpkgs
libresoc-pyelftools = callPackage ./libresoc-pyelftools.nix {};
mdis = callPackage ./mdis.nix {};
# libresoc's nmigen fork has been renamed to https://github.com/amaranth-lang/amaranth
# amaranth is packaged in nixpkgs but we can't just override a few of the attributes the way we did for pyelftools,
# because the names are different, so much of this is copied from the amaranth build recipe
nmigen = callPackage ./nmigen.nix {};
# libresoc's nmigen-soc fork has been renamed to https://github.com/amaranth-lang/amaranth-soc.
# suffers from the same rename issue as the previous commit with renaming issue as nmigen/amaranth
nmigen-soc = callPackage ./nmigen-soc.nix {inherit nmigen;};
# libresoc's nmutil fork, used for differential testing
nmutil = callPackage ./nmutil.nix {inherit nmigen pytest-output-to-files;};
# library for running pin multiplexers
pinmux = callPackage ./pinmux.nix {};
# libresoc's PowerPC emulator
power-instruction-analyzer = callPackage ./power-instruction-analyzer.nix {};
# libresoc's test harness
pytest-output-to-files = callPackage ./pytest-output-to-files.nix {};
# SoC target circuit synthesized to nmigen(-soc)
soc = callPackage ./soc.nix {
inherit
libresoc-c4m-jtag
libresoc-ieee754fpu
libresoc-openpower-isa
nmigen-soc
power-instruction-analyzer
pytest-output-to-files
;
};
in
# SoC synthesized to Verilog
callPackage ./soc.nix {
inherit
libresoc-c4m-jtag
libresoc-ieee754fpu
libresoc-openpower-isa
nmigen-soc
power-instruction-analyzer
pytest-output-to-files
;
}
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51 changes: 0 additions & 51 deletions pkgs/default.nix
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Expand Up @@ -33,57 +33,6 @@
pretalx-venueless
pretalx-public-voting
;

libresoc = let
in rec {
# JTAG debugging
libresoc-c4m-jtag = callPackage ./libresoc/c4m-jtag.nix {inherit nmigen nmigen-soc;};
# floating point implementation
libresoc-ieee754fpu = callPackage ./libresoc/ieee754fpu.nix {inherit nmutil nmigen pytest-output-to-files;};
# openpower-isa
libresoc-openpower-isa = callPackage ./libresoc/openpower-isa.nix {
inherit
libresoc-pyelftools
mdis
nmigen
nmutil
pytest-output-to-files
;
};
# use libre-soc's fork of pyelftools, few commits have diverged from pyelftools packaged by nixpkgs
libresoc-pyelftools = callPackage ./libresoc/libresoc-pyelftools.nix {};
mdis = callPackage ./libresoc/mdis.nix {};
# upstream nmigen has been renamed to https://github.com/amaranth-lang/amaranth.
# amaranth is packaged in nixpkgs but we can't just override a few of the attributes the way we did for pyelftools,
# because the names are different, so much of this is copied from the amaranth build recipe.
nmigen = callPackage ./libresoc/nmigen.nix {};
# nmigen-soc was not currently packaged in nixpkgs during work on this PR. However,
# it was also renamed to https://github.com/amaranth-lang/amaranth-soc and has now been packaged in nixpkgs,
# but suffers from the same rename issue as the previous commit with nmigen and amaranth
nmigen-soc = callPackage ./libresoc/nmigen-soc.nix {inherit nmigen;};
# upstream tool for running verilog circuit against linux emulator
nmutil = callPackage ./libresoc/nmutil.nix {inherit nmigen pytest-output-to-files;};
# upstream library for running pin multiplexers
pinmux = callPackage ./libresoc/pinmux.nix {};
# upstream emulator of power ISA
power-instruction-analyzer = callPackage ./libresoc/power-instruction-analyzer.nix {};
# upstream test harness
pytest-output-to-files = callPackage ./libresoc/pytest-output-to-files.nix {};
# SoC target circuit synthesized to nmigen(-soc)
soc = callPackage ./libresoc/soc.nix {
inherit
libresoc-c4m-jtag
libresoc-ieee754fpu
libresoc-openpower-isa
nmigen-soc
power-instruction-analyzer
pytest-output-to-files
;
};

# SoC synthesized to Verilog
verilog = callPackage ./libresoc/verilog.nix {inherit pinmux soc;};
};
};
in
self

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