sim: Implement SYNC and CCTRL

mrisc32 · Mar 11, 2023 · 7af9daf · 7af9daf
1 parent e8e24d5
commit 7af9daf
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Showing 2 changed files with 11 additions and 0 deletions.
diff --git a/sim/cpu.hpp b/sim/cpu.hpp
@@ -168,6 +168,9 @@ class cpu_t {
   static const uint32_t EX_OP_FUNPH = 0x017du;
   static const uint32_t EX_OP_FSQRT = 0x087du;
 
+  static const uint32_t EX_OP_SYNC = 0x007eu;
+  static const uint32_t EX_OP_CCTRL = 0x017eu;
+
   // Memory operations.
   static const uint32_t MEM_OP_NONE = 0x0u;
   static const uint32_t MEM_OP_LOAD8 = 0x1u;

diff --git a/sim/cpu_simple.cpp b/sim/cpu_simple.cpp
@@ -2601,6 +2601,14 @@ uint32_t cpu_simple_t::run(const uint32_t start_addr, const int64_t max_cycles)
                     ex_result = fsqrt32(src_a, src_b);
                 }
                 break;
+              case EX_OP_SYNC:
+                // Not much to do here.
+                ex_result = 0U;
+                break;
+              case EX_OP_CCTRL:
+                // Not much to do here.
+                ex_result = src_c;
+                break;
             }
           }