Support AVX512_BITALG instructions and relax base register req in VM operands #199
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…hlin#165) This makes it easier to debug avogen: when you emit invalid syntax, you can inspect the generated file to determine what went wrong, instead of having only gofmt's error to work with.
Add necessary feature checks to the dot and geohash examples to prevent illegal instruction errors. Fixes mmcloughlin#170 mmcloughlin#153
Replaces gobin with the preferred tools.mod solution for pinning tool dependencies. Updates mmcloughlin#166
Adds a method to the Attribute type to test for each flag in the textflag.h header.
…#182) Many of the instruction functions correctly match the size of immediate values, but they only accept unsigned immediates. This PR fixes the operand check functions for intermediate types to also accept the signed variants. Fixes mmcloughlin#181
Currently `avo` uses `BP` as a standard general-purpose register. However, `BP` is used for the frame pointer and should be callee-save. Under some circumstances, the Go assembler will do this automatically, but not always. At the moment `avo` can produce code that clobbers the `BP` register. Since Go 1.16 this code will also fail a new `go vet` check. This PR provides a (currently sub-optimal) fix for the issue. It introduces an `EnsureBasePointerCalleeSaved` pass which will check if the base pointer is written to by a function, and if so will artificially ensure that the function has a non-zero frame size. This will trigger the Go assembler to automatically save and restore the BP register. In addition, we update the `asmdecl` tool to `asmvet`, which includes the `framepointer` vet check. Updates mmcloughlin#156
Update github.com/klauspost/compress version. Add github.com/klauspost/reedsolomon and github.com/minio/md5-simd. Add `-mod=mod` to commands due to golang/go#44129.
Required updates to the thirdparty test suite due to modules changes in go toolchain.
Link to Filippo's live stream of rewriting the filippo.io/edwards25519 assembly with avo. Reformat the "learn more" links in a list.
Restrict permissions of github token. Pin action versions. Following advice in briansmith/untrusted#50.
Upgrades codecov-action in order to fix codecov errors CI, for example: https://github.com/mmcloughlin/avo/runs/3389170262?check_suite_focus=true#step:10:11 See codecov/codecov-action#322.
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Codecov Report
@@ Coverage Diff @@
## avx512 #199 +/- ##
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- Coverage 75.57% 71.22% -4.35%
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Files 58 59 +1
Lines 79634 90787 +11153
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+ Hits 60184 64666 +4482
- Misses 19294 25963 +6669
- Partials 156 158 +2
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I'm not sure why the It also looks like 'lint' and 'thirdparty' are currently failing on the go1.17 branch, and since I merged that in... Also failing here. Perhaps it was a mistake to do that, happy to revert the CI to 1.16 on this branch if moving to 1.17 is complicated. |
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@mmcloughlin What needs to happen to get this merged? This is the last thing blocking me from moving off my fork and back to Avo |
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Can we split this into two? For the BITALG stuff, I'd like any hand edits to be recorded as patch files. It's looking unlikely that opcodes will ever be updated, but in theory, it could be. Basically, we need to get to the point where running the
For the vm operands, it basically looks good but it needs more tests. Let me take a look at this. |
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Sure thing! Thanks for the quick response. Here's a new PR for the S/G mem op validation: #233 |
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And another PR with the requested patch file. #234 If it's not too much to ask, I'll leave the patching mechanics and opcodes rebuild up to you, since you seem to have a vision for how that should all work that would probably take longer to communicate than to just implement. |
For sure. |
This PR updates the AVX512 branch only, and brings the following:
Relaxes the current requirement that VM operands in VPSCATTER/GATHER have a base register.
Adds support for AVX512_BITALG instructions / forms.
internal/data/x86_64.xmlas that seemed the path of least resistance, andscripts/generatewas run to regeneratebuild/zinstructions.goet al.Additionally it:
masterbranchgo1.17branch)