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all: VPCLMULQDQ instruction (#360)
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Adds VEX and EVEX encoded versions of the `PCLMULQDQ` carry-less quadword
multiplication instruction.

These are added via the `opcodesextra` mechanism #345, since they're missing
from the opcodes database.

Contributed by @vsivsi. Extracted from #349 with minor tweaks.

Co-authored-by: Vaughn Iverson <[email protected]>
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@mmcloughlin @vsivsi
mmcloughlin and vsivsi authored Jan 10, 2023
1 parent b893b32 commit 7dac51a
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14 changes: 11 additions & 3 deletions build/zinstructions.go
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40 changes: 40 additions & 0 deletions internal/inst/ztable.go
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1 change: 1 addition & 0 deletions internal/opcodesextra/instructions.go
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Original file line number Diff line number Diff line change
Expand Up @@ -9,6 +9,7 @@ var sets = [][]*inst.Instruction{
gfni,
vaes,
vnni,
vpclmulqdq,
}

// Instructions returns a list of extras to add to the instructions database.
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141 changes: 141 additions & 0 deletions internal/opcodesextra/vpclmulqdq.go
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Original file line number Diff line number Diff line change
@@ -0,0 +1,141 @@
package opcodesextra

import "github.com/mmcloughlin/avo/internal/inst"

// vpclmulqdq adds VEX and EVEX encoded versions of the PCLMULQDQ carry-less
// quadword multiplication instruction.
var vpclmulqdq = []*inst.Instruction{
// Reference: https://github.com/golang/go/blob/go1.19.3/src/cmd/internal/obj/x86/avx_optabs.go#L2911-L2917
//
// {as: AVPCLMULQDQ, ytab: _yvpclmulqdq, prefix: Pavx, op: opBytes{
// avxEscape | vex128 | vex66 | vex0F3A | vexW0, 0x44,
// avxEscape | vex256 | vex66 | vex0F3A | vexW0, 0x44,
// avxEscape | evex128 | evex66 | evex0F3A | evexW0, evexN16, 0x44,
// avxEscape | evex256 | evex66 | evex0F3A | evexW0, evexN32, 0x44,
// avxEscape | evex512 | evex66 | evex0F3A | evexW0, evexN64, 0x44,
// }},
//
{
Opcode: "VPCLMULQDQ",
Summary: "Carry-Less Quadword Multiplication",
// See: https://www.felixcloutier.com/x86/pclmulqdq
//
// Reference: https://github.com/golang/go/blob/go1.19.3/src/cmd/internal/obj/x86/avx_optabs.go#L676-L682
//
// var _yvpclmulqdq = []ytab{
// {zcase: Zvex_i_rm_v_r, zoffset: 2, args: argList{Yu8, Yxm, Yxr, Yxr}},
// {zcase: Zvex_i_rm_v_r, zoffset: 2, args: argList{Yu8, Yym, Yyr, Yyr}},
// {zcase: Zevex_i_rm_v_r, zoffset: 3, args: argList{Yu8, YxmEvex, YxrEvex, YxrEvex}},
// {zcase: Zevex_i_rm_v_r, zoffset: 3, args: argList{Yu8, YymEvex, YyrEvex, YyrEvex}},
// {zcase: Zevex_i_rm_v_r, zoffset: 3, args: argList{Yu8, Yzm, Yzr, Yzr}},
// }
//
Forms: inst.Forms{
// VEX.128.66.0F3A.WIG 44 /r ib VPCLMULQDQ xmm1, xmm2, xmm3/m128, imm8
{
ISA: []string{"AVX", "PCLMULQDQ"},
Operands: []inst.Operand{
{Type: "imm8"},
{Type: "m128", Action: inst.R},
{Type: "xmm", Action: inst.R},
{Type: "xmm", Action: inst.W},
},
EncodingType: inst.EncodingTypeVEX,
},
{
ISA: []string{"AVX", "PCLMULQDQ"},
Operands: []inst.Operand{
{Type: "imm8"},
{Type: "xmm", Action: inst.R},
{Type: "xmm", Action: inst.R},
{Type: "xmm", Action: inst.W},
},
EncodingType: inst.EncodingTypeVEX,
},
// VEX.256.66.0F3A.WIG 44 /r /ib VPCLMULQDQ ymm1, ymm2, ymm3/m256, imm8
{
ISA: []string{"VPCLMULQDQ"},
Operands: []inst.Operand{
{Type: "imm8"},
{Type: "m256", Action: inst.R},
{Type: "ymm", Action: inst.R},
{Type: "ymm", Action: inst.W},
},
EncodingType: inst.EncodingTypeVEX,
},
{
ISA: []string{"VPCLMULQDQ"},
Operands: []inst.Operand{
{Type: "imm8"},
{Type: "ymm", Action: inst.R},
{Type: "ymm", Action: inst.R},
{Type: "ymm", Action: inst.W},
},
EncodingType: inst.EncodingTypeVEX,
},
// EVEX.128.66.0F3A.WIG 44 /r /ib VPCLMULQDQ xmm1, xmm2, xmm3/m128, imm8
{
ISA: []string{"AVX512VL", "VPCLMULQDQ"},
Operands: []inst.Operand{
{Type: "imm8"},
{Type: "m128", Action: inst.R},
{Type: "xmm", Action: inst.R},
{Type: "xmm", Action: inst.W},
},
EncodingType: inst.EncodingTypeEVEX,
},
{
ISA: []string{"AVX512VL", "VPCLMULQDQ"},
Operands: []inst.Operand{
{Type: "imm8"},
{Type: "xmm", Action: inst.R},
{Type: "xmm", Action: inst.R},
{Type: "xmm", Action: inst.W},
},
EncodingType: inst.EncodingTypeEVEX,
},
// EVEX.256.66.0F3A.WIG 44 /r /ib VPCLMULQDQ ymm1, ymm2, ymm3/m256, imm8
{
ISA: []string{"AVX512VL", "VPCLMULQDQ"},
Operands: []inst.Operand{
{Type: "imm8"},
{Type: "m256", Action: inst.R},
{Type: "ymm", Action: inst.R},
{Type: "ymm", Action: inst.W},
},
EncodingType: inst.EncodingTypeEVEX,
},
{
ISA: []string{"AVX512VL", "VPCLMULQDQ"},
Operands: []inst.Operand{
{Type: "imm8"},
{Type: "ymm", Action: inst.R},
{Type: "ymm", Action: inst.R},
{Type: "ymm", Action: inst.W},
},
EncodingType: inst.EncodingTypeEVEX,
},
// EVEX.512.66.0F3A.WIG 44 /r /ib VPCLMULQDQ zmm1, zmm2, zmm3/m512, imm8
{
ISA: []string{"AVX512F", "VPCLMULQDQ"},
Operands: []inst.Operand{
{Type: "imm8"},
{Type: "m512", Action: inst.R},
{Type: "zmm", Action: inst.R},
{Type: "zmm", Action: inst.W},
},
EncodingType: inst.EncodingTypeEVEX,
},
{
ISA: []string{"AVX512F", "VPCLMULQDQ"},
Operands: []inst.Operand{
{Type: "imm8"},
{Type: "zmm", Action: inst.R},
{Type: "zmm", Action: inst.R},
{Type: "zmm", Action: inst.W},
},
EncodingType: inst.EncodingTypeEVEX,
},
},
},
}
8 changes: 6 additions & 2 deletions x86/zctors.go
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12 changes: 12 additions & 0 deletions x86/zctors_test.go
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