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Add multicycle delay from OSD to VGA
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gyurco committed Sep 14, 2018
1 parent 3cbf107 commit 0c999cd
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3 changes: 3 additions & 0 deletions vic20.sdc
Original file line number Diff line number Diff line change
Expand Up @@ -39,6 +39,9 @@ set_clock_groups -asynchronous -group [get_clocks {SPI_SCK}] -group [get_clocks
set_output_delay -clock [get_clocks pll|altpll_component|auto_generated|pll1|clk[0]] -max 0 [get_ports {VGA_*}]
set_output_delay -clock [get_clocks pll|altpll_component|auto_generated|pll1|clk[0]] -min -5 [get_ports {VGA_*}]

set_multicycle_path -to {VGA_*[*]} -setup 2
set_multicycle_path -to {VGA_*[*]} -hold 2

# SDRAM delays
set_input_delay -clock [get_clocks {pll|altpll_component|auto_generated|pll1|clk[0]}] -max 6.4 [get_ports SDRAM_DQ[*]]
set_input_delay -clock [get_clocks {pll|altpll_component|auto_generated|pll1|clk[0]}] -min 3.2 [get_ports SDRAM_DQ[*]]
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