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add phy_done diagnostics register
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sbourdeauducq committed Jan 20, 2020
1 parent 2fd6391 commit ed7dc91
Showing 1 changed file with 10 additions and 4 deletions.
14 changes: 10 additions & 4 deletions jesd204b/core.py
Original file line number Diff line number Diff line change
Expand Up @@ -18,6 +18,7 @@ def __init__(self, phys, jesd_settings, converter_data_width):
self.enable = Signal()
self.jsync = Signal()
self.jref = Signal()
self.phy_done = Signal()
self.ready = Signal()
self.restart = Signal()

Expand Down Expand Up @@ -55,8 +56,8 @@ def __init__(self, phys, jesd_settings, converter_data_width):
)

links = []
link_reset = Signal()
self.comb += link_reset.eq(~reduce(and_, [phy.transmitter.init.done for phy in phys]))
phy_done = Signal()
self.comb += phy_done.eq(reduce(and_, [phy.transmitter.init.done for phy in phys]))
for n, (phy, lane) in enumerate(zip(phys, transport.source.flatten())):
phy_name = "phy{}".format(n)
phy_cd = phy_name + "_tx"
Expand All @@ -72,7 +73,7 @@ def __init__(self, phys, jesd_settings, converter_data_width):
self.submodules += link
links.append(link)
self.comb += [
link.reset.eq(link_reset),
link.reset.eq(~phy_done),
link.jsync.eq(self.jsync_jesd),
link.jref.eq(self.jref)
]
Expand All @@ -95,7 +96,10 @@ def __init__(self, phys, jesd_settings, converter_data_width):
phy_cd)
ready = Signal()
self.comb += ready.eq(reduce(and_, [link.ready for link in links]))
self.specials += MultiReg(ready, self.ready)
self.specials += [
MultiReg(phy_done, self.phy_done),
MultiReg(ready, self.ready)
]

# JSYNC is asynchronous and the I/O can be passed directly to the core.
def register_jsync(self, jsync):
Expand All @@ -121,6 +125,7 @@ def do_finalize(self):
class JESD204BCoreTXControl(Module, AutoCSR):
def __init__(self, core):
self.enable = CSRStorage()
self.phy_done = CSRStatus()
self.ready = CSRStatus()

self.prbs_config = CSRStorage(4)
Expand All @@ -141,6 +146,7 @@ def __init__(self, core):

self.jsync.status.eq(core.jsync_sys),

self.phy_done.status.eq(core.phy_done),
self.ready.status.eq(core.ready)
]

Expand Down

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