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[i2c] Clean up target mode transaction boundaries and NACK handling #22460

Merged
merged 4 commits into from
Apr 12, 2024

Commits on Apr 12, 2024

  1. [i2c] Eliminate multi-item repeated start entry in ACQ FIFO

    Change recording of Start symbols to always accompany the address data,
    instead of recording a separate R.Start, then Start+address. This helps
    maintain certain availability invariants needed for reliable stretching
    and NACK handling.
    
    Note that a controller that chooses to do a Repeated Start and address a
    *different* target is an unusual case, and it leads to a situation where
    the transfer closing symbol won't appear until the Stop or a later
    Repeated Start that *does* address this target. While this transaction
    style is not explicitly forbidden in the I2C specification, it is not
    typically supported in the wild. In any case, software should be able to
    resolve this case, and a closing symbol will eventually appear.
    
    Fix up the DV transaction generation to match the expected behavior.
    
    Signed-off-by: Alexander Williams <[email protected]>
    a-will committed Apr 12, 2024
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  2. [i2c] Overhaul target mode NACKing

    Remove the extra NACK-specific states, generate ACQ FIFO entries at the
    point of the NACK timeout, and go to WaitForStop to release SDA and SCL.
    Return 0xFF on reads for NACK'd transactions.
    
    Add NackStop as an ACQ FIFO value to indicate the end of transactions
    that had errors (generally, NACK'd transfers).
    
    Fix up the glitch sequence to better handle the various states.
    
    Signed-off-by: Alexander Williams <[email protected]>
    a-will committed Apr 12, 2024
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  3. [i2c] Add StretchAcqSetup state to preserve ACK setup time

    Add StretchAcqSetup state to follow the release of the hold from
    StretchAcqFull after the ACQ FIFO gains the necessary space. Continue to
    stretch SCL so the change to SDA doesn't violate setup time, then
    proceed to the normal ACK setup state.
    
    Remove the immediate write to the ACQ FIFO in the StretchAcqFull state
    when we're proceeding to a normal ACK. This created extra ACQ FIFO
    writes when it transitioned to the AcquireAckWait state, and the FSM
    gets simpler and less error-prone if only error cases operate on FIFOs
    outside of the non-stretch states.
    
    Signed-off-by: Alexander Williams <[email protected]>
    a-will committed Apr 12, 2024
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  4. [testutils,i2c] Stop waiting upon receiving a NACK

    End the transaction wait if the controller receives a NACK.
    
    Signed-off-by: Alexander Williams <[email protected]>
    a-will committed Apr 12, 2024
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