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[spi_device,dv] Update testbench to mention new flash_status bits, mode and read pipeline #21862

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rswarbrick opened this issue Mar 6, 2024 · 3 comments
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[spi_device,dv] Update testbench to mention new flash_status bits, mode and read pipeline #21862

rswarbrick opened this issue Mar 6, 2024 · 3 comments
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@antmarzam
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Component:DV DV issue: testbench, test case, etc. IP:spi_device

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@rswarbrick
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Description

This is to update the DV side of things to match the RTL changes that have been applied in the last couple of months (end of 2023 / start of 2024).

Practically speaking, this will mean that our existing test sequences cover some more behaviours. Since it's required for testing every intended feature, this is a requirement for V2 status.
@rswarbrick rswarbrick added Component:DV DV issue: testbench, test case, etc. IP:spi_device labels Mar 6, 2024
@rswarbrick rswarbrick mentioned this issue Mar 6, 2024
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@antmarzam
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PR #21977 - takes care of the new flash_status bits and behaviour change on flash_status: SPI side updates on each SPI-byte beat. TL-UL side updates on CSB going high. Also, READ_STATUS(#1/2/3) no longer wrap if the host leaves CSB active until the RTL returns multiple bytes.

@antmarzam
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PR #22139 takes care of the new read pipeline feature

@antmarzam
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Addr_mode changes in #23362
Further flash_status fixes in #22763

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@antmarzam antmarzam

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Component:DV DV issue: testbench, test case, etc. IP:spi_device
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