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Flow error that dc is unsupported for job runtime extraction #16562
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The Please see these warnings:
And this error:
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I ran a dc synthesis flow but dvsim gives report below.
The command i ran is "./util/dvsim/dvsim.py -t dc hw/top_earlgrey/syn/chip_earlgrey_asic_syn_cfg.hjson --purge --local" , which found at readme "OpenTitan Synthesis Flow".
Below is build.log
I saw the issue #16295 and tried the fixes proposed in #16501 , but it's not work for me.
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