[top_earlgrey] Use SPI_DEV_CLK as scan clock

Select SPI_DEV_CLK as scan clock input. Because it is originally a clock
anyway, the DIO connects to a minimal amount of flops.

An alternate choice might be the EXT_CLK input, which would avoid some
of the complex timing constraints already on the SPI_DEV_CLK pad.

Signed-off-by: Alexander Williams <[email protected]>

hw/top_earlgrey/rtl/scan_role_pkg.sv

@@ -21,7 +21,7 @@ package scan_role_pkg;
   parameter scan_role_e DioPadSpiDevD1ScanRole        = NoScan;
   parameter scan_role_e DioPadSpiDevD2ScanRole        = NoScan;
   parameter scan_role_e DioPadSpiDevD3ScanRole        = NoScan;
-  parameter scan_role_e DioPadSpiDevClkScanRole       = NoScan;
+  parameter scan_role_e DioPadSpiDevClkScanRole       = ScanClock;
   parameter scan_role_e DioPadSpiDevCsLScanRole       = NoScan;
   parameter scan_role_e DioPadUsbPScanRole            = NoScan;
   parameter scan_role_e DioPadUsbNScanRole            = NoScan;