[entropy_src] Remove unneeded main SM state and input signals

Now that the CS AES Halt interface is handled by the SHA3 core itself, the Sha3Quiesce / Sha3MsgDone states can be combined into one state. This helps reducing the latency of the conditioner and thus the backpressure onto the entropy pipeline. The main_stage_rdy_i input signal can be removed as this is identical to the sha3_state_vld_i input signal checked in Sha3Valid. At this point in the FSM, it is always asserted and doesn't need to be checked again. Signed-off-by: Pirmin Vogel <[email protected]>
lowRISC · Mar 6, 2024 · 534a41e · 534a41e
1 parent 0b88a66
commit 534a41e
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Showing 4 changed files with 6 additions and 21 deletions.
diff --git a/hw/ip/entropy_src/rtl/entropy_src_core.sv b/hw/ip/entropy_src/rtl/entropy_src_core.sv
@@ -368,7 +368,6 @@ module entropy_src_core import entropy_src_pkg::*; #(
 
   logic [PreCondWidth-1:0]  pfifo_cond_wdata;
   logic [SeedLen-1:0]       pfifo_cond_rdata;
-  logic                     pfifo_cond_not_empty;
   logic                     pfifo_cond_push;
 
   logic [ObserveFifoWidth-1:0] pfifo_precon_wdata;
@@ -2702,7 +2701,6 @@ module entropy_src_core import entropy_src_pkg::*; #(
   assign msg_data[0] = pfifo_cond_wdata;
 
   assign pfifo_cond_rdata = sha3_state[0][SeedLen-1:0];
-  assign pfifo_cond_not_empty = sha3_state_vld;
 
   // SHA3 hashing engine
   sha3 #(
@@ -2826,7 +2824,6 @@ module entropy_src_core import entropy_src_pkg::*; #(
     .alert_thresh_fail_i  (alert_threshold_fail),
     .rst_alert_cntr_o     (rst_alert_cntr),
     .bypass_mode_i        (es_bypass_mode),
-    .main_stage_rdy_i     (pfifo_cond_not_empty),
     .bypass_stage_rdy_i   (pfifo_bypass_not_empty),
     .sha3_state_vld_i     (sha3_state_vld),
     .main_stage_push_o    (main_stage_push_raw),
@@ -2835,7 +2832,6 @@ module entropy_src_core import entropy_src_pkg::*; #(
     .sha3_start_o         (sha3_start_raw),
     .sha3_process_o       (sha3_process),
     .sha3_done_o          (sha3_done),
-    .cs_aes_halt_ack_i    (cs_aes_halt_i.cs_aes_halt_ack),
     .local_escalate_i     (es_cntr_err_sum),
     .main_sm_alert_o      (es_main_sm_alert),
     .main_sm_idle_o       (es_main_sm_idle),

diff --git a/hw/ip/entropy_src/rtl/entropy_src_main_sm.sv b/hw/ip/entropy_src/rtl/entropy_src_main_sm.sv
@@ -20,7 +20,6 @@ module entropy_src_main_sm
   input logic                   alert_thresh_fail_i,
   output logic                  rst_alert_cntr_o,
   input logic                   bypass_mode_i,
-  input logic                   main_stage_rdy_i,
   input logic                   bypass_stage_rdy_i,
   input logic                   sha3_state_vld_i,
   output logic                  main_stage_push_o,
@@ -29,7 +28,6 @@ module entropy_src_main_sm
   output logic                  sha3_start_o,
   output logic                  sha3_process_o,
   output prim_mubi_pkg::mubi4_t sha3_done_o,
-  input logic                   cs_aes_halt_ack_i,
   input logic                   local_escalate_i,
   output logic                  main_sm_alert_o,
   output logic                  main_sm_idle_o,
@@ -245,21 +243,14 @@ module entropy_src_main_sm
           sha3_done_o = prim_mubi_pkg::MuBi4True;
           state_d = Sha3MsgDone;
         end else begin
-          if (main_stage_rdy_i) begin
-            // Push the digest produced by the SHA3 engine into the final FIFO and clear the
-            // internal state of the SHA3 engine to start from scratch for the next seed.
-            sha3_done_o = prim_mubi_pkg::MuBi4True;
-            main_stage_push_o = 1'b1;
-            state_d = Sha3MsgDone;
-          end
+          // Push the digest produced by the SHA3 engine into the final FIFO and clear the
+          // internal state of the SHA3 engine to start from scratch for the next seed.
+          sha3_done_o = prim_mubi_pkg::MuBi4True;
+          main_stage_push_o = 1'b1;
+          state_d = Sha3MsgDone;
         end
       end
       Sha3MsgDone: begin
-        if (!cs_aes_halt_ack_i) begin
-          state_d = Sha3Quiesce;
-        end
-      end
-      Sha3Quiesce: begin
         if (!enable_i || fw_ov_ent_insert_i) begin
           state_d = Idle;
         end else begin

diff --git a/hw/ip/entropy_src/rtl/entropy_src_main_sm_pkg.sv b/hw/ip/entropy_src/rtl/entropy_src_main_sm_pkg.sv
@@ -42,11 +42,10 @@ package entropy_src_main_sm_pkg;
     ContHTRunning  = 9'b110100010, // continuous test mode, wait for health test done pulse
     FWInsertStart  = 9'b011000011, // fw ov mode, start the sha3 block
     FWInsertMsg    = 9'b001011001, // fw ov mode, insert fw message into sha3 block
-    Sha3MsgDone    = 9'b100001111, // sha3 mode, all input messages added, ready to process
+    Sha3MsgDone    = 9'b100001111, // sha3 mode, sha3 state cleared, go to continuous check mode
     Sha3Process    = 9'b011111000, // sha3 mode, pulse the sha3 process input
     Sha3Valid      = 9'b010111111, // sha3 mode, wait for sha3 valid indication
     Sha3Done       = 9'b110011000, // sha3 mode, capture sha3 result, pulse done input
-    Sha3Quiesce    = 9'b100111001, // sha3 mode, goto alert state or continuous check mode
     AlertState     = 9'b111001101, // if some alert condition occurs, pulse an alert indication
     AlertHang      = 9'b111111011, // after pulsing alert signal, hang here until sw handles
     Error          = 9'b001110011  // illegal state reached and hang

diff --git a/sw/device/lib/dif/dif_entropy_src.h b/sw/device/lib/dif/dif_entropy_src.h
@@ -69,7 +69,6 @@ typedef enum dif_entropy_src_main_fsm {
   kDifEntropySrcMainFsmStateSha3Process = 0x0f8,
   kDifEntropySrcMainFsmStateSha3Valid = 0x0bf,
   kDifEntropySrcMainFsmStateSha3Done = 0x198,
-  kDifEntropySrcMainFsmStateSha3Quiesce = 0x139,
   kDifEntropySrcMainFsmStateAlertState = 0x1cd,
   kDifEntropySrcMainFsmStateAlertHang = 0x1fb,
   kDifEntropySrcMainFsmStateError = 0x73