Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Jump to bottom

[Zk ext] V.1.0.0 Scalar cryptography extension implementation for the Ibex core #1480

Open
wants to merge 25 commits into
base: master
Choose a base branch
from
Open

[Zk ext] V.1.0.0 Scalar cryptography extension implementation for the Ibex core #1480

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
25 commits
Select commit Hold shift + click to select a range
268bdaa
Zk: add support to the zkh extension
phthinh Nov 23, 2021
0e43b0e
Zk: add implementation for the zkh extension
phthinh Nov 23, 2021
033900c
Zk: add support for the aes instructions
phthinh Nov 24, 2021
dee7228
Zk: add the implementation for AES instructions
phthinh Nov 24, 2021
4a9472e
Zk: add the implementation for AES instructions
phthinh Nov 24, 2021
f95dab2
Zk: add support for decode the SM3/4 instructions.
phthinh Nov 24, 2021
45e7d2d
ZK: add the implementation of SM3/4 instructions
phthinh Nov 25, 2021
6df183a
ZK: add the implementation of SM3/4 instructions
phthinh Nov 25, 2021
06d9be9
Zk: add support for decode the ZBK instructions.
phthinh Nov 26, 2021
887d877
Zk: add the implementation of the Zbk(Zbkb, Zbkc, Zbkx) instructions.
phthinh Nov 26, 2021
e8967f8
ZK: small fixes for zip/unzip instructions
phthinh Nov 30, 2021
687250c
Merge branch 'lowRISC:master' into zk_ext
phthinh Dec 1, 2021
5f5eddb
add the Zk feature for Ibex configurations.
phthinh Dec 2, 2021
1ef9340
ZK: add --RV32Zk argument for Fusesoc.
phthinh Dec 2, 2021
6393a5d
ZK: edit rtl code style for veriblelint check.
phthinh Dec 2, 2021
c66cfbc
ZK: fix a define-style issue of RV32B in riscv_compliance test.
phthinh Dec 2, 2021
cd015f6
ZK: fix a define-style issue of RV32Zk.
phthinh Dec 2, 2021
9402788
Merge branch 'lowRISC:master' into zk_ext
phthinh Dec 2, 2021
f3d43d0
ZK: fix the rtl code style issues
phthinh Dec 3, 2021
3a1eb7c
ZK: stick to the macro name style rule, change RV32Zk -> RV32K.
phthinh Dec 3, 2021
a8ebc6f
Merge branch 'master' into zk_ext
phthinh Dec 7, 2021
4990ce7
ZK: fix some changes in rtl from upstream merging.
phthinh Dec 7, 2021
704eaf3
ZK: fix a line length style.
phthinh Dec 8, 2021
2204257
Merge branch 'master' into zk_ext
phthinh Jan 4, 2022
47f2dc9
fix lint errors
phthinh Jan 4, 2022
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
7 changes: 7 additions & 0 deletions dv/riscv_compliance/ibex_riscv_compliance.core
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -42,6 +42,12 @@ parameters:
paramtype: vlogdefine
description: "Bitmanip implementation parameter enum. See the ibex_pkg::rv32b_e enum in ibex_pkg.sv for permitted values."

RV32K:
datatype: str
default: ibex_pkg::RV32ZkNone
paramtype: vlogdefine
description: "Cryptography extension implementation parameter enum. See the ibex_pkg::rv32zk_e enum in ibex_pkg.sv for permitted values."

RegFile:
datatype: str
default: ibex_pkg::RegFileFF
Expand Down Expand Up @@ -112,6 +118,7 @@ targets:
- RV32E
- RV32M
- RV32B
- RV32K
- RegFile
- ICache
- ICacheECC
Expand Down
7 changes: 7 additions & 0 deletions dv/riscv_compliance/rtl/ibex_riscv_compliance.sv
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -10,6 +10,10 @@
* simulators (if the top-level clk and rst ports are replaced with a generated
* clock).
*/
`ifndef RV32K
`define RV32K ibex_pkg::RV32ZkNone
`endif

module ibex_riscv_compliance (
input IO_CLK,
input IO_RST_N
Expand All @@ -21,6 +25,8 @@ module ibex_riscv_compliance (
parameter bit RV32E = 1'b0;
parameter ibex_pkg::rv32m_e RV32M = ibex_pkg::RV32MFast;
parameter ibex_pkg::rv32b_e RV32B = ibex_pkg::RV32BNone;
parameter ibex_pkg::rv32zk_e RV32K = `RV32K;

parameter ibex_pkg::regfile_e RegFile = ibex_pkg::RegFileFF;
parameter bit BranchTargetALU = 1'b0;
parameter bit WritebackStage = 1'b0;
Expand Down Expand Up @@ -120,6 +126,7 @@ module ibex_riscv_compliance (
.RV32E (RV32E ),
.RV32M (RV32M ),
.RV32B (RV32B ),
.RV32K (RV32K ),
.RegFile (RegFile ),
.BranchTargetALU (BranchTargetALU ),
.WritebackStage (WritebackStage ),
Expand Down
7 changes: 7 additions & 0 deletions dv/verilator/simple_system_cosim/ibex_simple_system_cosim.core
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -35,6 +35,12 @@ parameters:
paramtype: vlogdefine
description: "Bitmanip implementation parameter enum. See the ibex_pkg::rv32b_e enum in ibex_pkg.sv for permitted values."

RV32K:
datatype: str
default: ibex_pkg::RV32ZkNone
paramtype: vlogdefine
description: "Cryptography extension implementation parameter enum. See the ibex_pkg::rv32zk_e enum in ibex_pkg.sv for permitted values."

RegFile:
datatype: str
default: ibex_pkg::RegFileFF
Expand Down Expand Up @@ -109,6 +115,7 @@ targets:
- RV32E
- RV32M
- RV32B
- RV32K
- RegFile
- ICache
- ICacheECC
Expand Down
7 changes: 7 additions & 0 deletions examples/simple_system/ibex_simple_system.core
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -31,6 +31,12 @@ parameters:
paramtype: vlogdefine
description: "Bitmanip implementation parameter enum. See the ibex_pkg::rv32b_e enum in ibex_pkg.sv for permitted values."

RV32K:
datatype: str
default: ibex_pkg::RV32ZkNone
paramtype: vlogdefine
description: "Cryptography extension implementation parameter enum. See the ibex_pkg::rv32zk_e enum in ibex_pkg.sv for permitted values."

RegFile:
datatype: str
default: ibex_pkg::RegFileFF
Expand Down Expand Up @@ -105,6 +111,7 @@ targets:
- RV32E
- RV32M
- RV32B
- RV32K
- RegFile
- ICache
- ICacheECC
Expand Down
6 changes: 6 additions & 0 deletions examples/simple_system/rtl/ibex_simple_system.sv
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -14,6 +14,10 @@
`define RV32B ibex_pkg::RV32BNone
`endif

`ifndef RV32K
`define RV32K ibex_pkg::RV32ZkNone
`endif

`ifndef RegFile
`define RegFile ibex_pkg::RegFileFF
`endif
Expand Down Expand Up @@ -42,6 +46,7 @@ module ibex_simple_system (
parameter bit RV32E = 1'b0;
parameter ibex_pkg::rv32m_e RV32M = `RV32M;
parameter ibex_pkg::rv32b_e RV32B = `RV32B;
parameter ibex_pkg::rv32zk_e RV32K = `RV32K;
parameter ibex_pkg::regfile_e RegFile = `RegFile;
parameter bit BranchTargetALU = 1'b0;
parameter bit WritebackStage = 1'b0;
Expand Down Expand Up @@ -170,6 +175,7 @@ module ibex_simple_system (
.RV32E ( RV32E ),
.RV32M ( RV32M ),
.RV32B ( RV32B ),
.RV32K ( RV32K ),
.RegFile ( RegFile ),
.BranchTargetALU ( BranchTargetALU ),
.ICache ( ICache ),
Expand Down
44 changes: 44 additions & 0 deletions ibex_configs.yaml
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -11,6 +11,7 @@ small:
RV32E : 0
RV32M : "ibex_pkg::RV32MFast"
RV32B : "ibex_pkg::RV32BNone"
RV32K : "ibex_pkg::RV32ZkNone"
RegFile : "ibex_pkg::RegFileFF"
BranchTargetALU : 0
WritebackStage : 0
Expand All @@ -27,6 +28,7 @@ opentitan:
RV32E : 0
RV32M : "ibex_pkg::RV32MSingleCycle"
RV32B : "ibex_pkg::RV32BOTEarlGrey"
RV32K : "ibex_pkg::RV32ZkNone"
RegFile : "ibex_pkg::RegFileFF"
BranchTargetALU : 1
WritebackStage : 1
Expand All @@ -49,6 +51,7 @@ experimental-maxperf:
RV32E : 0
RV32M : "ibex_pkg::RV32MSingleCycle"
RV32B : "ibex_pkg::RV32BNone"
RV32K : "ibex_pkg::RV32ZkNone"
RegFile : "ibex_pkg::RegFileFF"
BranchTargetALU : 1
WritebackStage : 1
Expand All @@ -65,6 +68,7 @@ experimental-maxperf-pmp:
RV32E : 0
RV32M : "ibex_pkg::RV32MSingleCycle"
RV32B : "ibex_pkg::RV32BNone"
RV32K : "ibex_pkg::RV32ZkNone"
RegFile : "ibex_pkg::RegFileFF"
BranchTargetALU : 1
WritebackStage : 1
Expand All @@ -81,6 +85,7 @@ experimental-maxperf-pmp-bmbalanced:
RV32E : 0
RV32M : "ibex_pkg::RV32MSingleCycle"
RV32B : "ibex_pkg::RV32BBalanced"
RV32K : "ibex_pkg::RV32ZkNone"
RegFile : "ibex_pkg::RegFileFF"
BranchTargetALU : 1
WritebackStage : 1
Expand All @@ -97,6 +102,7 @@ experimental-maxperf-pmp-bmfull:
RV32E : 0
RV32M : "ibex_pkg::RV32MSingleCycle"
RV32B : "ibex_pkg::RV32BFull"
RV32K : "ibex_pkg::RV32ZkNone"
RegFile : "ibex_pkg::RegFileFF"
BranchTargetALU : 1
WritebackStage : 1
Expand All @@ -108,11 +114,47 @@ experimental-maxperf-pmp-bmfull:
PMPNumRegions : 16
SecureIbex : 0

# experimental-maxperf-pmp config above with zkn extension
experimental-maxperf-pmp-zkn:
RV32E : 0
RV32M : "ibex_pkg::RV32MSingleCycle"
RV32B : "ibex_pkg::RV32BNone"
RV32K : "ibex_pkg::RV32Zkn"
RegFile : "ibex_pkg::RegFileFF"
BranchTargetALU : 1
WritebackStage : 1
ICache : 0
ICacheECC : 0
BranchPredictor : 0
PMPEnable : 1
PMPGranularity : 0
PMPNumRegions : 16
SecureIbex : 0

# experimental-maxperf-pmp config above with zks extension
experimental-maxperf-pmp-zks:
RV32E : 0
RV32M : "ibex_pkg::RV32MSingleCycle"
RV32B : "ibex_pkg::RV32BNone"
RV32K : "ibex_pkg::RV32Zks"
RegFile : "ibex_pkg::RegFileFF"
BranchTargetALU : 1
WritebackStage : 1
ICache : 0
ICacheECC : 0
BranchPredictor : 0
PMPEnable : 1
PMPGranularity : 0
PMPNumRegions : 16
SecureIbex : 0


# experimental-maxperf-pmp-bmfull config above with icache enabled
experimental-maxperf-pmp-bmfull-icache:
RV32E : 0
RV32M : "ibex_pkg::RV32MSingleCycle"
RV32B : "ibex_pkg::RV32BFull"
RV32K : "ibex_pkg::RV32ZkNone"
RegFile : "ibex_pkg::RegFileFF"
BranchTargetALU : 1
WritebackStage : 1
Expand All @@ -132,6 +174,7 @@ experimental-branch-predictor:
RV32E : 0
RV32M : "ibex_pkg::RV32MSingleCycle"
RV32B : "ibex_pkg::RV32BNone"
RV32K : "ibex_pkg::RV32ZkNone"
RegFile : "ibex_pkg::RegFileFF"
BranchTargetALU : 1
WritebackStage : 1
Expand All @@ -143,3 +186,4 @@ experimental-branch-predictor:
PMPNumRegions : 4
SecureIbex : 0


10 changes: 10 additions & 0 deletions ibex_core.core
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -34,6 +34,10 @@ filesets:
- rtl/ibex_pmp.sv
- rtl/ibex_wb_stage.sv
- rtl/ibex_dummy_instr.sv
- rtl/ibex_zk.sv
- rtl/ibex_aes_sbox.sv
- rtl/ibex_sm4_sbox.sv
- rtl/ibex_poly16_mul.sv
- rtl/ibex_core.sv
file_type: systemVerilogSource

Expand Down Expand Up @@ -81,6 +85,12 @@ parameters:
paramtype: vlogdefine
description: "Bitmanip implementation parameter enum. See the ibex_pkg::rv32b_e enum in ibex_pkg.sv for permitted values."

RV32K:
datatype: str
default: ibex_pkg::RV32ZkNone
paramtype: vlogdefine
description: "Cryptography extension implementation parameter enum. See the ibex_pkg::rv32zk_e enum in ibex_pkg.sv for permitted values."

RegFile:
datatype: str
default: ibex_pkg::RegFileFF
Expand Down
7 changes: 7 additions & 0 deletions ibex_top_tracing.core
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -41,6 +41,12 @@ parameters:
paramtype: vlogdefine
description: "Bitmanip implementation parameter enum. See the ibex_pkg::rv32b_e enum in ibex_pkg.sv for permitted values."

RV32K:
datatype: str
default: ibex_pkg::RV32ZkNone
paramtype: vlogdefine
description: "Cryptography extension implementation parameter enum. See the ibex_pkg::rv32zk_e enum in ibex_pkg.sv for permitted values."

RegFile:
datatype: str
default: ibex_pkg::RegFileFF
Expand Down Expand Up @@ -117,6 +123,7 @@ targets:
- RV32E
- RV32M
- RV32B
- RV32K
- RegFile
- ICache
- ICacheECC
Expand Down
Loading