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[AArch64] Assertion `VT.isVector() == N1.getValueType().isVector() && "TRUNCATE result type type should be vector iff the operand " "type is vector!"' failed. #81216

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DianQK opened this issue Feb 9, 2024 · 4 comments · Fixed by #81256
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[AArch64] Assertion `VT.isVector() == N1.getValueType().isVector() && "TRUNCATE result type type should be vector iff the operand " "type is vector!"' failed. #81216

DianQK opened this issue Feb 9, 2024 · 4 comments · Fixed by #81256
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@nikic
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backend:AArch64 llvm:crash release:backport
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LLVM 18.X Release

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@DianQK
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DianQK commented Feb 9, 2024

I tried the following code that would trigger the assertion:

target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64-unknown-linux-gnu"

define void @foo(ptr %0, <16 x i1> %1) {
bb1.i:
  %.bc = bitcast <16 x i1> %1 to <2 x i8>
  %.extract100 = extractelement <2 x i8> %.bc, i64 0
  %_47 = icmp eq i8 %.extract100, 0
  br i1 %_47, label %bb20, label %bb23

bb20:                                             ; preds = %bb1.i
  store <16 x i8> zeroinitializer, ptr %0, align 1
  br label %bb23

bb23:                                             ; preds = %bb20, %bb1.i
  ret void
}

https://llvm.godbolt.org/z/narrKadhK

From: rust-lang/rust#120813

Details 

llc: /home/dianqk/llvm/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:5786: SDValue llvm::SelectionDAG::getNode(unsigned int, const SDLoc &, EVT, SDValue, const SDNodeFlags): Assertion `VT.isVector() == N1.getValueType().isVector() && "TRUNCATE result type type should be vector iff the operand " "type is vector!"' failed.
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace.
Stack dump:
0.      Program arguments: ../llvm-project/build/bin/llc foo.ll
1.      Running pass 'Function Pass Manager' on module 'foo.ll'.
2.      Running pass 'AArch64 Instruction Selection' on function '@foo'
 #0 0x0000556ff83f71ea ___interceptor_backtrace.part.0 (../llvm-project/build/bin/llc+0xe91ea)
 #1 0x00007fe4460288c1 llvm::sys::PrintStackTrace(llvm::raw_ostream&, int) /home/dianqk/llvm/llvm-project/llvm/lib/Support/Unix/Signals.inc:723:13
 #2 0x00007fe446029a2e llvm::sys::RunSignalHandlers() /home/dianqk/llvm/llvm-project/llvm/lib/Support/Signals.cpp:0:5
 #3 0x00007fe446029a2e SignalHandler(int) /home/dianqk/llvm/llvm-project/llvm/lib/Support/Unix/Signals.inc:403:3
 #4 0x00007fe44ac54eb0 __restore_rt (/nix/store/7jiqcrg061xi5clniy7z5pvkc4jiaqav-glibc-2.38-27/lib/libc.so.6+0x3deb0)
 #5 0x00007fe44aca402c __pthread_kill_implementation (/nix/store/7jiqcrg061xi5clniy7z5pvkc4jiaqav-glibc-2.38-27/lib/libc.so.6+0x8d02c)
 #6 0x00007fe44ac54e06 gsignal (/nix/store/7jiqcrg061xi5clniy7z5pvkc4jiaqav-glibc-2.38-27/lib/libc.so.6+0x3de06)
 #7 0x00007fe44ac3d8f5 abort (/nix/store/7jiqcrg061xi5clniy7z5pvkc4jiaqav-glibc-2.38-27/lib/libc.so.6+0x268f5)
 #8 0x00007fe44ac3d819 _nl_load_domain.cold (/nix/store/7jiqcrg061xi5clniy7z5pvkc4jiaqav-glibc-2.38-27/lib/libc.so.6+0x26819)
 #9 0x00007fe44ac4d686 (/nix/store/7jiqcrg061xi5clniy7z5pvkc4jiaqav-glibc-2.38-27/lib/libc.so.6+0x36686)
#10 0x00007fe44e60ec7f llvm::SelectionDAG::getNode(unsigned int, llvm::SDLoc const&, llvm::EVT, llvm::SDValue, llvm::SDNodeFlags) /home/dianqk/llvm/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:5784:5
#11 0x00007fe44e5b719d llvm::SelectionDAG::getNode(unsigned int, llvm::SDLoc const&, llvm::EVT, llvm::SDValue) /home/dianqk/llvm/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:5605:10
#12 0x00007fe44e5b719d llvm::SelectionDAG::getZExtOrTrunc(llvm::SDValue, llvm::SDLoc const&, llvm::EVT) /home/dianqk/llvm/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1464:5
#13 0x00007fe45441467f replaceBoolVectorBitcast(llvm::SDNode*, llvm::SmallVectorImpl<llvm::SDValue>&, llvm::SelectionDAG&) /home/dianqk/llvm/llvm-project/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:0:27
#14 0x00007fe45441467f llvm::AArch64TargetLowering::ReplaceBITCASTResults(llvm::SDNode*, llvm::SmallVectorImpl<llvm::SDValue>&, llvm::SelectionDAG&) const /home/dianqk/llvm/llvm-project/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:24619:12
#15 0x00007fe454418b7a llvm::AArch64TargetLowering::ReplaceNodeResults(llvm::SDNode*, llvm::SmallVectorImpl<llvm::SDValue>&, llvm::SelectionDAG&) const /home/dianqk/llvm/llvm-project/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:0:5
#16 0x00007fe44e2cf55f llvm::DAGTypeLegalizer::CustomLowerNode(llvm::SDNode*, llvm::EVT, bool) /home/dianqk/llvm/llvm-project/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp:0:0
#17 0x00007fe44e201ad4 llvm::DAGTypeLegalizer::PromoteIntegerResult(llvm::SDNode*, unsigned int) /home/dianqk/llvm/llvm-project/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp:46:7
#18 0x00007fe44e2c33b9 llvm::DAGTypeLegalizer::run() /home/dianqk/llvm/llvm-project/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp:0:9
#19 0x00007fe44e2d3982 llvm::SelectionDAG::LegalizeTypes() /home/dianqk/llvm/llvm-project/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp:0:34
#20 0x00007fe44e6fffcf llvm::SelectionDAGISel::CodeGenAndEmitDAG() /home/dianqk/llvm/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:0:23
#21 0x00007fe44e6fe50e llvm::SelectionDAGISel::SelectBasicBlock(llvm::ilist_iterator_w_bits<llvm::ilist_detail::node_options<llvm::Instruction, true, false, void, true>, false, true>, llvm::ilist_iterator_w_bits<llvm::ilist_detail::node_options<llvm::Instruction, true, false, void, true>, false, true>, bool&) /home/dianqk/llvm/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:0:3
#22 0x00007fe44e6fa8ee llvm::SelectionDAGISel::SelectAllBasicBlocks(llvm::Function const&) /home/dianqk/llvm/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1511:8
#23 0x00007fe44e6ef0bb llvm::SelectionDAGISel::runOnMachineFunction(llvm::MachineFunction&) /home/dianqk/llvm/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:517:7
#24 0x00007fe44cb174a4 llvm::MachineFunctionPass::runOnFunction(llvm::Function&) /home/dianqk/llvm/llvm-project/llvm/lib/CodeGen/MachineFunctionPass.cpp:0:13
#25 0x00007fe446f13795 llvm::FPPassManager::runOnFunction(llvm::Function&) /home/dianqk/llvm/llvm-project/llvm/lib/IR/LegacyPassManager.cpp:1455:11
#26 0x00007fe446f2bd24 llvm::ilist_iterator<llvm::ilist_detail::node_options<llvm::Function, true, false, void, false>, false, false>::operator++() /home/dianqk/llvm/llvm-project/llvm/include/llvm/ADT/ilist_iterator.h:157:48
#27 0x00007fe446f2bd24 llvm::FPPassManager::runOnModule(llvm::Module&) /home/dianqk/llvm/llvm-project/llvm/lib/IR/LegacyPassManager.cpp:1490:20
#28 0x00007fe446f14680 (anonymous namespace)::MPPassManager::runOnModule(llvm::Module&) /home/dianqk/llvm/llvm-project/llvm/lib/IR/LegacyPassManager.cpp:0:27
#29 0x00007fe446f14680 llvm::legacy::PassManagerImpl::run(llvm::Module&) /home/dianqk/llvm/llvm-project/llvm/lib/IR/LegacyPassManager.cpp:542:44
#30 0x0000556ff84e54b5 compileModule(char**, llvm::LLVMContext&) /home/dianqk/llvm/llvm-project/llvm/tools/llc/llc.cpp:0:8
#31 0x0000556ff84de6d0 main /home/dianqk/llvm/llvm-project/llvm/tools/llc/llc.cpp:408:13
#32 0x00007fe44ac3f0ce __libc_start_call_main (/nix/store/7jiqcrg061xi5clniy7z5pvkc4jiaqav-glibc-2.38-27/lib/libc.so.6+0x280ce)
#33 0x00007fe44ac3f189 __libc_start_main@GLIBC_2.2.5 (/nix/store/7jiqcrg061xi5clniy7z5pvkc4jiaqav-glibc-2.38-27/lib/libc.so.6+0x28189)
#34 0x0000556ff83a50c5 _start (../llvm-project/build/bin/llc+0x970c5)
zsh: IOT instruction (core dumped)  ../llvm-project/build/bin/llc foo.ll

@llvmbot
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llvmbot commented Feb 9, 2024

@llvm/issue-subscribers-backend-aarch64

Author: Quentin Dian (DianQK)

I tried the following code that would trigger the assertion: 
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64-unknown-linux-gnu"

define void @<!-- -->foo(ptr %0, &lt;16 x i1&gt; %1) {
bb1.i:
  %.bc = bitcast &lt;16 x i1&gt; %1 to &lt;2 x i8&gt;
  %.extract100 = extractelement &lt;2 x i8&gt; %.bc, i64 0
  %_47 = icmp eq i8 %.extract100, 0
  br i1 %_47, label %bb20, label %bb23

bb20:                                             ; preds = %bb1.i
  store &lt;16 x i8&gt; zeroinitializer, ptr %0, align 1
  br label %bb23

bb23:                                             ; preds = %bb20, %bb1.i
  ret void
}

https://llvm.godbolt.org/z/narrKadhK

From: rust-lang/rust#120813

<details><summary>Details</summary>
<p>

llc: /home/dianqk/llvm/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:5786: SDValue llvm::SelectionDAG::getNode(unsigned int, const SDLoc &amp;, EVT, SDValue, const SDNodeFlags): Assertion `VT.isVector() == N1.getValueType().isVector() &amp;&amp; "TRUNCATE result type type should be vector iff the operand " "type is vector!"' failed.
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace.
Stack dump:
0.      Program arguments: ../llvm-project/build/bin/llc foo.ll
1.      Running pass 'Function Pass Manager' on module 'foo.ll'.
2.      Running pass 'AArch64 Instruction Selection' on function '@<!-- -->foo'
 #<!-- -->0 0x0000556ff83f71ea ___interceptor_backtrace.part.0 (../llvm-project/build/bin/llc+0xe91ea)
 #<!-- -->1 0x00007fe4460288c1 llvm::sys::PrintStackTrace(llvm::raw_ostream&amp;, int) /home/dianqk/llvm/llvm-project/llvm/lib/Support/Unix/Signals.inc:723:13
 #<!-- -->2 0x00007fe446029a2e llvm::sys::RunSignalHandlers() /home/dianqk/llvm/llvm-project/llvm/lib/Support/Signals.cpp:0:5
 #<!-- -->3 0x00007fe446029a2e SignalHandler(int) /home/dianqk/llvm/llvm-project/llvm/lib/Support/Unix/Signals.inc:403:3
 #<!-- -->4 0x00007fe44ac54eb0 __restore_rt (/nix/store/7jiqcrg061xi5clniy7z5pvkc4jiaqav-glibc-2.38-27/lib/libc.so.6+0x3deb0)
 #<!-- -->5 0x00007fe44aca402c __pthread_kill_implementation (/nix/store/7jiqcrg061xi5clniy7z5pvkc4jiaqav-glibc-2.38-27/lib/libc.so.6+0x8d02c)
 #<!-- -->6 0x00007fe44ac54e06 gsignal (/nix/store/7jiqcrg061xi5clniy7z5pvkc4jiaqav-glibc-2.38-27/lib/libc.so.6+0x3de06)
 #<!-- -->7 0x00007fe44ac3d8f5 abort (/nix/store/7jiqcrg061xi5clniy7z5pvkc4jiaqav-glibc-2.38-27/lib/libc.so.6+0x268f5)
 #<!-- -->8 0x00007fe44ac3d819 _nl_load_domain.cold (/nix/store/7jiqcrg061xi5clniy7z5pvkc4jiaqav-glibc-2.38-27/lib/libc.so.6+0x26819)
 #<!-- -->9 0x00007fe44ac4d686 (/nix/store/7jiqcrg061xi5clniy7z5pvkc4jiaqav-glibc-2.38-27/lib/libc.so.6+0x36686)
#<!-- -->10 0x00007fe44e60ec7f llvm::SelectionDAG::getNode(unsigned int, llvm::SDLoc const&amp;, llvm::EVT, llvm::SDValue, llvm::SDNodeFlags) /home/dianqk/llvm/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:5784:5
#<!-- -->11 0x00007fe44e5b719d llvm::SelectionDAG::getNode(unsigned int, llvm::SDLoc const&amp;, llvm::EVT, llvm::SDValue) /home/dianqk/llvm/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:5605:10
#<!-- -->12 0x00007fe44e5b719d llvm::SelectionDAG::getZExtOrTrunc(llvm::SDValue, llvm::SDLoc const&amp;, llvm::EVT) /home/dianqk/llvm/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1464:5
#<!-- -->13 0x00007fe45441467f replaceBoolVectorBitcast(llvm::SDNode*, llvm::SmallVectorImpl&lt;llvm::SDValue&gt;&amp;, llvm::SelectionDAG&amp;) /home/dianqk/llvm/llvm-project/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:0:27
#<!-- -->14 0x00007fe45441467f llvm::AArch64TargetLowering::ReplaceBITCASTResults(llvm::SDNode*, llvm::SmallVectorImpl&lt;llvm::SDValue&gt;&amp;, llvm::SelectionDAG&amp;) const /home/dianqk/llvm/llvm-project/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:24619:12
#<!-- -->15 0x00007fe454418b7a llvm::AArch64TargetLowering::ReplaceNodeResults(llvm::SDNode*, llvm::SmallVectorImpl&lt;llvm::SDValue&gt;&amp;, llvm::SelectionDAG&amp;) const /home/dianqk/llvm/llvm-project/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:0:5
#<!-- -->16 0x00007fe44e2cf55f llvm::DAGTypeLegalizer::CustomLowerNode(llvm::SDNode*, llvm::EVT, bool) /home/dianqk/llvm/llvm-project/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp:0:0
#<!-- -->17 0x00007fe44e201ad4 llvm::DAGTypeLegalizer::PromoteIntegerResult(llvm::SDNode*, unsigned int) /home/dianqk/llvm/llvm-project/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp:46:7
#<!-- -->18 0x00007fe44e2c33b9 llvm::DAGTypeLegalizer::run() /home/dianqk/llvm/llvm-project/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp:0:9
#<!-- -->19 0x00007fe44e2d3982 llvm::SelectionDAG::LegalizeTypes() /home/dianqk/llvm/llvm-project/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp:0:34
#<!-- -->20 0x00007fe44e6fffcf llvm::SelectionDAGISel::CodeGenAndEmitDAG() /home/dianqk/llvm/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:0:23
#<!-- -->21 0x00007fe44e6fe50e llvm::SelectionDAGISel::SelectBasicBlock(llvm::ilist_iterator_w_bits&lt;llvm::ilist_detail::node_options&lt;llvm::Instruction, true, false, void, true&gt;, false, true&gt;, llvm::ilist_iterator_w_bits&lt;llvm::ilist_detail::node_options&lt;llvm::Instruction, true, false, void, true&gt;, false, true&gt;, bool&amp;) /home/dianqk/llvm/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:0:3
#<!-- -->22 0x00007fe44e6fa8ee llvm::SelectionDAGISel::SelectAllBasicBlocks(llvm::Function const&amp;) /home/dianqk/llvm/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1511:8
#<!-- -->23 0x00007fe44e6ef0bb llvm::SelectionDAGISel::runOnMachineFunction(llvm::MachineFunction&amp;) /home/dianqk/llvm/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:517:7
#<!-- -->24 0x00007fe44cb174a4 llvm::MachineFunctionPass::runOnFunction(llvm::Function&amp;) /home/dianqk/llvm/llvm-project/llvm/lib/CodeGen/MachineFunctionPass.cpp:0:13
#<!-- -->25 0x00007fe446f13795 llvm::FPPassManager::runOnFunction(llvm::Function&amp;) /home/dianqk/llvm/llvm-project/llvm/lib/IR/LegacyPassManager.cpp:1455:11
#<!-- -->26 0x00007fe446f2bd24 llvm::ilist_iterator&lt;llvm::ilist_detail::node_options&lt;llvm::Function, true, false, void, false&gt;, false, false&gt;::operator++() /home/dianqk/llvm/llvm-project/llvm/include/llvm/ADT/ilist_iterator.h:157:48
#<!-- -->27 0x00007fe446f2bd24 llvm::FPPassManager::runOnModule(llvm::Module&amp;) /home/dianqk/llvm/llvm-project/llvm/lib/IR/LegacyPassManager.cpp:1490:20
#<!-- -->28 0x00007fe446f14680 (anonymous namespace)::MPPassManager::runOnModule(llvm::Module&amp;) /home/dianqk/llvm/llvm-project/llvm/lib/IR/LegacyPassManager.cpp:0:27
#<!-- -->29 0x00007fe446f14680 llvm::legacy::PassManagerImpl::run(llvm::Module&amp;) /home/dianqk/llvm/llvm-project/llvm/lib/IR/LegacyPassManager.cpp:542:44
#<!-- -->30 0x0000556ff84e54b5 compileModule(char**, llvm::LLVMContext&amp;) /home/dianqk/llvm/llvm-project/llvm/tools/llc/llc.cpp:0:8
#<!-- -->31 0x0000556ff84de6d0 main /home/dianqk/llvm/llvm-project/llvm/tools/llc/llc.cpp:408:13
#<!-- -->32 0x00007fe44ac3f0ce __libc_start_call_main (/nix/store/7jiqcrg061xi5clniy7z5pvkc4jiaqav-glibc-2.38-27/lib/libc.so.6+0x280ce)
#<!-- -->33 0x00007fe44ac3f189 __libc_start_main@<!-- -->GLIBC_2.2.5 (/nix/store/7jiqcrg061xi5clniy7z5pvkc4jiaqav-glibc-2.38-27/lib/libc.so.6+0x28189)
#<!-- -->34 0x0000556ff83a50c5 _start (../llvm-project/build/bin/llc+0x970c5)
zsh: IOT instruction (core dumped)  ../llvm-project/build/bin/llc foo.ll

</p>
</details>

@DianQK DianQK mentioned this issue Feb 9, 2024
Closed
@nikic nikic added this to the LLVM 18.X Release milestone Feb 9, 2024
@github-project-automation github-project-automation bot moved this to Needs Triage in LLVM Release Status Feb 9, 2024
@nikic nikic moved this from Needs Triage to Needs Fix in LLVM Release Status Feb 9, 2024
@nikic
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nikic commented Feb 9, 2024

Reduced:

define <2 x i8> @test(<16 x i1> %arg) {
  %bc = bitcast <16 x i1> %arg to <2 x i8>
  ret <2 x i8> %bc
}

@nikic nikic self-assigned this Feb 9, 2024
nikic added a commit to nikic/llvm-project that referenced this issue Feb 9, 2024
@nikic
[AArch64] Only apply bool vector bitcast opt if result is scalar
3741022 
This optimization tries to optimize bitcasts from <N x i1> to iN,
but currently also triggers for <N x i1> to <M x iK> bitcasts,
if custom lowering has been requested for these for an unrelated
reason. Fix this by explicitly checking that the result type is
scalar.

Fixes llvm#81216.
@nikic nikic mentioned this issue Feb 9, 2024
Merged
nikic added a commit that referenced this issue Feb 12, 2024
@nikic
[AArch64] Only apply bool vector bitcast opt if result is scalar (#81256
92d7992 
)

This optimization tries to optimize bitcasts from `<N x i1>` to iN, but
currently also triggers for `<N x i1>` to `<M x iK>` bitcasts, if custom
lowering has been requested for these for an unrelated reason. Fix this
by explicitly checking that the result type is scalar.

Fixes #81216.
@github-project-automation github-project-automation bot moved this from Needs Fix to Done in LLVM Release Status Feb 12, 2024
@nikic
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nikic commented Feb 12, 2024

/cherry-pick 92d7992

llvmbot pushed a commit to llvmbot/llvm-project that referenced this issue Feb 12, 2024
@nikic @llvmbot
[AArch64] Only apply bool vector bitcast opt if result is scalar (llv…
c9f2f85 
…m#81256)

This optimization tries to optimize bitcasts from `<N x i1>` to iN, but
currently also triggers for `<N x i1>` to `<M x iK>` bitcasts, if custom
lowering has been requested for these for an unrelated reason. Fix this
by explicitly checking that the result type is scalar.

Fixes llvm#81216.

(cherry picked from commit 92d7992)
@llvmbot
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llvmbot commented Feb 12, 2024

/pull-request #81454

@EugeneZelenko EugeneZelenko added release:backport and removed llvm:SelectionDAG SelectionDAGISel as well labels Feb 12, 2024
nikic added a commit to rust-lang/llvm-project that referenced this issue Feb 13, 2024
@nikic
[AArch64] Only apply bool vector bitcast opt if result is scalar (llv…
7ff82b2 
…m#81256)

This optimization tries to optimize bitcasts from `<N x i1>` to iN, but
currently also triggers for `<N x i1>` to `<M x iK>` bitcasts, if custom
lowering has been requested for these for an unrelated reason. Fix this
by explicitly checking that the result type is scalar.

Fixes llvm#81216.

(cherry picked from commit 92d7992)
nikic added a commit to nikic/llvm-project that referenced this issue Feb 14, 2024
@nikic
[AArch64] Only apply bool vector bitcast opt if result is scalar (llv…
b870661 
…m#81256)

This optimization tries to optimize bitcasts from `<N x i1>` to iN, but
currently also triggers for `<N x i1>` to `<M x iK>` bitcasts, if custom
lowering has been requested for these for an unrelated reason. Fix this
by explicitly checking that the result type is scalar.

Fixes llvm#81216.

(cherry picked from commit 92d7992)
cuviper pushed a commit to rust-lang/llvm-project that referenced this issue Feb 14, 2024
@nikic @cuviper
[AArch64] Only apply bool vector bitcast opt if result is scalar (llv…
d1e9093 
…m#81256)

This optimization tries to optimize bitcasts from `<N x i1>` to iN, but
currently also triggers for `<N x i1>` to `<M x iK>` bitcasts, if custom
lowering has been requested for these for an unrelated reason. Fix this
by explicitly checking that the result type is scalar.

Fixes llvm#81216.

(cherry picked from commit 92d7992)
llvmbot pushed a commit to llvmbot/llvm-project that referenced this issue Feb 16, 2024
@nikic @tstellar
[AArch64] Only apply bool vector bitcast opt if result is scalar (llv…
e098f6c 
…m#81256)

This optimization tries to optimize bitcasts from `<N x i1>` to iN, but
currently also triggers for `<N x i1>` to `<M x iK>` bitcasts, if custom
lowering has been requested for these for an unrelated reason. Fix this
by explicitly checking that the result type is scalar.

Fixes llvm#81216.

(cherry picked from commit 92d7992)
MingcongBai pushed a commit to AOSC-Tracking/llvm-project that referenced this issue Mar 26, 2024
@nikic @MingcongBai
[AArch64] Only apply bool vector bitcast opt if result is scalar (llv…
575b9c0 
…m#81256)

This optimization tries to optimize bitcasts from `<N x i1>` to iN, but
currently also triggers for `<N x i1>` to `<M x iK>` bitcasts, if custom
lowering has been requested for these for an unrelated reason. Fix this
by explicitly checking that the result type is scalar.

Fixes llvm#81216.

(cherry picked from commit 92d7992)
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@nikic nikic

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backend:AArch64 llvm:crash release:backport
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[AArch64] Only apply bool vector bitcast opt if result is scalar nikic/llvm-project
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@nikic @EugeneZelenko @DianQK @llvmbot