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[AVR] Fix inaccurate offsets in PC relative branch instructions
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In avr-gcc, the destination of "rjmp label + offset" is address
'label + offset', while destination of "rjmp . + offset" is
'address_of_rjmp + offset + 2'.

Clang is in accordance with avr-gcc for "rjmp label + offset", but
emits incorrect destination of "rjmp . + offset" to
'address_of_rjmp + offset', in which the expected offset 2 is missing.

This patch fixes the above issue.

Fixes #60019

Reviewed By: jacquesguan, aykevl

Differential Revision: https://reviews.llvm.org/D143901
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@benshi001
benshi001 committed Feb 14, 2023
1 parent 1e69211 commit 697a162
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Showing 6 changed files with 73 additions and 67 deletions.
6 changes: 6 additions & 0 deletions llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -514,6 +514,12 @@ bool AVRAsmBackend::shouldForceRelocation(const MCAssembler &Asm,
// Fixups which should always be recorded as relocations.
case AVR::fixup_7_pcrel:
case AVR::fixup_13_pcrel:
// Do not force relocation for PC relative branch like 'rjmp .',
// 'rcall . - off' and 'breq . + off'.
if (const auto *SymA = Target.getSymA())
if (SymA->getSymbol().getName().size() == 0)
return false;
[[fallthrough]];
case AVR::fixup_call:
return true;
}
Expand Down
12 changes: 6 additions & 6 deletions llvm/test/MC/AVR/inst-brbc.s
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Original file line number Diff line number Diff line change
Expand Up @@ -16,9 +16,9 @@ foo:
; CHECK: brcc .Ltmp1-16 ; encoding: [0bAAAAA000,0b111101AA]
; CHECK: ; fixup A - offset: 0, value: .Ltmp1-16, kind: fixup_7_pcrel

; INST: brvc .+0
; INST: brsh .+0
; INST: brne .-42
; INST: brpl .-44
; INST: brge .-46
; INST: brid .+48
; INST: 23 f4 brvc .+8
; INST: c0 f7 brsh .-16
; INST: 59 f7 brne .-42
; INST: 52 f7 brpl .-44
; INST: 4c f7 brge .-46
; INST: c7 f4 brid .+48
12 changes: 6 additions & 6 deletions llvm/test/MC/AVR/inst-brbs.s
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Original file line number Diff line number Diff line change
Expand Up @@ -16,9 +16,9 @@ foo:
; CHECK: brcs .Ltmp1-12 ; encoding: [0bAAAAA000,0b111100AA]
; CHECK: ; fixup A - offset: 0, value: .Ltmp1-12, kind: fixup_7_pcrel

; INST: brvs .+0
; INST: brlo .+0
; INST: breq .-42
; INST brmi .-44
; INST brlt .-46
; InST: brie .+28
; INST: 23 f0 brvs .+8
; INST: d0 f3 brlo .-12
; INST: 59 f3 breq .-42
; INST: 52 f3 brmi .-44
; INST: 4c f3 brlt .-46
; INST: 77 f0 brie .+28
80 changes: 40 additions & 40 deletions llvm/test/MC/AVR/inst-family-cond-branch.s
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Original file line number Diff line number Diff line change
Expand Up @@ -20,9 +20,9 @@ foo:
; CHECK: ; fixup A - offset: 0, value: baz, kind: fixup_7_pcrel

; INST-LABEL: <foo>:
; INST: breq .+0
; INST: breq .+0
; INST: breq .+0
; INST: breq .-18
; INST: breq .-12
; INST: breq .-18
; INST: breq .+0

; BRNE
Expand All @@ -40,9 +40,9 @@ foo:
; CHECK: brbc 1, bar ; encoding: [0bAAAAA001,0b111101AA]
; CHECK: ; fixup A - offset: 0, value: bar, kind: fixup_7_pcrel

; INST: brne .+0
; INST: brne .+0
; INST: brne .+0
; INST: brne .+10
; INST: brne .+2
; INST: brne .+10
; INST: brne .+0

bar:
Expand All @@ -62,9 +62,9 @@ bar:
; CHECK: ; fixup A - offset: 0, value: end, kind: fixup_7_pcrel

; INST-LABEL: <bar>:
; INST: brlo .+0
; INST: brlo .+0
; INST: brlo .+0
; INST: brlo .+8
; INST: brlo .+4
; INST: brlo .+8
; INST: brlo .+0

; BRCC
Expand All @@ -82,9 +82,9 @@ bar:
; CHECK: brcc baz ; encoding: [0bAAAAA000,0b111101AA]
; CHECK: ; fixup A - offset: 0, value: baz, kind: fixup_7_pcrel

; INST: brsh .+0
; INST: brsh .+0
; INST: brsh .+0
; INST: brsh .+66
; INST: brsh .-22
; INST: brsh .+66
; INST: brsh .+0

; BRSH
Expand All @@ -99,8 +99,8 @@ bar:
; CHECK: brsh car ; encoding: [0bAAAAA000,0b111101AA]
; CHECK: ; fixup A - offset: 0, value: car, kind: fixup_7_pcrel

; INST: brsh .+0
; INST: brsh .+0
; INST: brsh .+32
; INST: brsh .+70
; INST: brsh .+0

baz:
Expand All @@ -118,8 +118,8 @@ baz:
; CHECK: ; fixup A - offset: 0, value: car, kind: fixup_7_pcrel

; INST-LABEL: <baz>:
; INST: brlo .+0
; INST: brlo .+0
; INST: brlo .+12
; INST: brlo .+28
; INST: brlo .+0

; BRMI
Expand All @@ -134,8 +134,8 @@ baz:
; CHECK: brmi car ; encoding: [0bAAAAA010,0b111100AA]
; CHECK: ; fixup A - offset: 0, value: car, kind: fixup_7_pcrel

; INST: brmi .+0
; INST: brmi .+0
; INST: brmi .+66
; INST: brmi .+58
; INST: brmi .+0

; BRPL
Expand All @@ -150,8 +150,8 @@ baz:
; CHECK: brpl car ; encoding: [0bAAAAA010,0b111101AA]
; CHECK: ; fixup A - offset: 0, value: car, kind: fixup_7_pcrel

; INST: brpl .+0
; INST: brpl .+0
; INST: brpl .-12
; INST: brpl .+18
; INST: brpl .+0

; BRGE
Expand All @@ -166,8 +166,8 @@ baz:
; CHECK: brge car ; encoding: [0bAAAAA100,0b111101AA]
; CHECK: ; fixup A - offset: 0, value: car, kind: fixup_7_pcrel

; INST: brge .+0
; INST: brge .+0
; INST: brge .+50
; INST: brge .+42
; INST: brge .+0

car:
Expand All @@ -184,8 +184,8 @@ car:
; CHECK: ; fixup A - offset: 0, value: end, kind: fixup_7_pcrel

; INST-LABEL: <car>:
; INST: brlt .+0
; INST: brlt .+0
; INST: brlt .+16
; INST: brlt .+2
; INST: brlt .+0

; BRHS
Expand All @@ -200,8 +200,8 @@ car:
; CHECK: brhs just_another_label ; encoding: [0bAAAAA101,0b111100AA]
; CHECK: ; fixup A - offset: 0, value: just_another_label, kind: fixup_7_pcrel

; INST: brhs .+0
; INST: brhs .+0
; INST: brhs .-66
; INST: brhs .+14
; INST: brhs .+0

; BRHC
Expand All @@ -216,8 +216,8 @@ car:
; CHECK: brhc just_another_label ; encoding: [0bAAAAA101,0b111101AA]
; CHECK: ; fixup A - offset: 0, value: just_another_label, kind: fixup_7_pcrel

; INST: brhc .+0
; INST: brhc .+0
; INST: brhc .+12
; INST: brhc .+14
; INST: brhc .+0

; BRTS
Expand All @@ -232,8 +232,8 @@ car:
; CHECK: brts just_another_label ; encoding: [0bAAAAA110,0b111100AA]
; CHECK: ; fixup A - offset: 0, value: just_another_label, kind: fixup_7_pcrel

; INST: brts .+0
; INST: brts .+0
; INST: brts .+18
; INST: brts .+22
; INST: brts .+0

just_another_label:
Expand All @@ -250,8 +250,8 @@ just_another_label:
; CHECK: ; fixup A - offset: 0, value: end, kind: fixup_7_pcrel

; INST-LABEL: <just_another_label>:
; INST: brtc .+0
; INST: brtc .+0
; INST: brtc .+52
; INST: brtc .+50
; INST: brtc .+0

; BRVS
Expand All @@ -266,8 +266,8 @@ just_another_label:
; CHECK: brvs end ; encoding: [0bAAAAA011,0b111100AA]
; CHECK: ; fixup A - offset: 0, value: end, kind: fixup_7_pcrel

; INST: brvs .+0
; INST: brvs .+0
; INST: brvs .+18
; INST: brvs .+32
; INST: brvs .+0

; BRVC
Expand All @@ -282,8 +282,8 @@ just_another_label:
; CHECK: brvc end ; encoding: [0bAAAAA011,0b111101AA]
; CHECK: ; fixup A - offset: 0, value: end, kind: fixup_7_pcrel

; INST: brvc .+0
; INST: brvc .+0
; INST: brvc .-28
; INST: brvc .-62
; INST: brvc .+0

; BRIE
Expand All @@ -298,8 +298,8 @@ just_another_label:
; CHECK: brie end ; encoding: [0bAAAAA111,0b111100AA]
; CHECK: ; fixup A - offset: 0, value: end, kind: fixup_7_pcrel

; INST: brie .+0
; INST: brie .+0
; INST: brie .+20
; INST: brie .+40
; INST: brie .+0

; BRID
Expand All @@ -314,8 +314,8 @@ just_another_label:
; CHECK: brid end ; encoding: [0bAAAAA111,0b111101AA]
; CHECK: ; fixup A - offset: 0, value: end, kind: fixup_7_pcrel

; INST: brid .+0
; INST: brid .+0
; INST: brid .+42
; INST: brid .+62
; INST: brid .+0

end:
10 changes: 5 additions & 5 deletions llvm/test/MC/AVR/inst-rcall.s
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Original file line number Diff line number Diff line change
Expand Up @@ -20,8 +20,8 @@ foo:
; CHECK: rcall .Ltmp3+46 ; encoding: [A,0b1101AAAA]
; CHECK: ; fixup A - offset: 0, value: .Ltmp3+46, kind: fixup_13_pcrel

; INST: rcall .+0
; INST: rcall .+0
; INST: rcall .+0
; INST: rcall .+0
; INST: rcall .-44
; INST: 00 d0 rcall .+0
; INST: fc df rcall .-8
; INST: 06 d0 rcall .+12
; INST: 17 d0 rcall .+46
; INST: ea df rcall .-44
20 changes: 10 additions & 10 deletions llvm/test/MC/AVR/inst-rjmp.s
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Original file line number Diff line number Diff line change
Expand Up @@ -37,13 +37,13 @@ x:
; CHECK: rjmp x ; encoding: [A,0b1100AAAA]
; CHECK: ; fixup A - offset: 0, value: x, kind: fixup_13_pcrel

; INST: rjmp .+0
; INST: rjmp .+0
; INST: rjmp .+0
; INST: rjmp .+0
; INST: rjmp .+0
; INST: rjmp .+0
; INST: rjmp .+0
; INST: rjmp .+0
; INST: rjmp .+0
; INST: rjmp .+30
; INST: 01 c0 rjmp .+2
; INST: ff cf rjmp .-2
; INST: 00 c0 rjmp .+0
; INST: 04 c0 rjmp .+8
; INST: 00 c0 rjmp .+0
; INST: 00 c0 rjmp .+0
; INST: fe cf rjmp .-4
; INST: fd cf rjmp .-6
; INST: 00 c0 rjmp .+0
; INST: 0f c0 rjmp .+30

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