sunxi: fixed tlink k2x wk spi uart

kooiot · Mar 19, 2024 · d48cbf5 · d48cbf5
1 parent ab265f3
commit d48cbf5
Show file tree

Hide file tree

Showing 4 changed files with 12 additions and 13 deletions.
diff --git a/package/base-files/files/etc/build_version b/package/base-files/files/etc/build_version
@@ -1 +1 @@
-23.12.14
+24.03.19-2
diff --git a/target/linux/generic/files/drivers/tty/serial/wk2xxx_spi_v2.2/wk2xxx_spi_v2.2 b/target/linux/generic/files/drivers/tty/serial/wk2xxx_spi_v2.2/wk2xxx_spi_v2.2
diff --git a/target/linux/sunxi/patches-5.15/891-ARM-dts-sun8i-kooiot-tlink-dly-t3v1.patch b/target/linux/sunxi/patches-5.15/891-ARM-dts-sun8i-kooiot-tlink-dly-t3v1.patch
@@ -134,7 +134,7 @@
 +	emac_phy: ethernet-phy@1 {
 +		compatible = "ethernet-phy-ieee802.3-c22";
 +		reg = <1>;
-+		// reset-gpios = <&pio 7 27 GPIO_ACTIVE_HIGH>; /* PH27 */
++		// reset-gpios = <&pio 7 27 GPIO_ACTIVE_LOW>; /* PH27 */
 +		// reset-assert-us = <10000>;
 +		// reset-deassert-us = <1000000>;
 +	};

diff --git a/target/linux/sunxi/patches-5.15/915-ARM-dts-sun8i-kooiot-tlink-k2x.patch b/target/linux/sunxi/patches-5.15/915-ARM-dts-sun8i-kooiot-tlink-k2x.patch
@@ -144,12 +144,6 @@
 +			gpios = <&pio 8 7 GPIO_ACTIVE_HIGH>; /* PI7 */
 +		};
 +
-+		ex_uart_reset {
-+			gpio-export,name = "ex_uart_reset";
-+			gpio-export,output=<1>;
-+			gpios = <&pio 8 9 GPIO_ACTIVE_LOW>; /* PI9 */
-+		};
-+
 +		can_reset {
 +			gpio-export,name = "can_reset";
 +			gpio-export,output=<1>;
@@ -306,21 +300,22 @@
 +
 +&spi2 {
 +	pinctrl-names = "default";
-+	pinctrl-0 = <&spi2_pc_pins>, <&spi2_irq_pins>;
++	pinctrl-0 = <&spi2_pc_pins>, <&spi2_irq_pins>, <&spi2_reset_pins>;
 +	status = "okay";
 +
 +	spi2_serial: spi2-serial@0 {
-+		compatible = "wkmic,wk2132spi";
++		compatible = "wkmic,wk2132_spi";
 +		reg = <0>;
 +		spi-max-frequency = <10000000>;
 +		poll_mode = <0>;
 +		type = <0>;
 +		enable_dma = <0>;
-+		irq_gpio=<&pio 8 15 IRQ_TYPE_LEVEL_LOW>; /* PI15/EINT27 */
++		reset_gpio = <&pio 8 9 GPIO_ACTIVE_LOW>; /* PI9 */
++		irq_gpio=<&pio 8 15 IRQ_TYPE_LEVEL_LOW>; /* PI15 */
 +		status = "okay";
 +	};
 +
-+	mcp2515: mcp2515@0 {
++	mcp2515: mcp2515@1 {
 +		compatible = "microchip,mcp2515";
 +		reg = <1>;
 +		clocks = <&can_clk8m>;
@@ -448,6 +443,11 @@
 +		function = "irq";
 +	};
 +
++	spi2_reset_pins: spi2-reset-pins {
++		pins = "PI9";
++		function = "gpio_out";
++	};
++
 +	wifi_rst: wifi-rst-pin {
 +		pins = "PH6";
 +		function = "gpio_out";