rockchip: update rk3568 ethernet dts and driver

kooiot · Nov 20, 2024 · 25cec24 · 25cec24
1 parent afeadb0
commit 25cec24
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Showing 5 changed files with 1,778 additions and 25 deletions.
diff --git a/package/base-files/files/etc/build_version b/package/base-files/files/etc/build_version
@@ -1 +1 @@
-24.11.14-m
+24.11.20
diff --git a/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-tlink-r4x.dts b/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-tlink-r4x.dts
@@ -194,6 +194,20 @@
 		post-power-on-delay-ms = <100>;
 	};
 
+	gmac0_clkin: external-gmac0-clock {
+		compatible = "fixed-clock";
+		clock-frequency = <125000000>;
+		clock-output-names = "gmac0_clkin";
+		#clock-cells = <0>;
+	};
+
+	gmac1_clkin: external-gmac1-clock {
+		compatible = "fixed-clock";
+		clock-frequency = <125000000>;
+		clock-output-names = "gmac1_clkin";
+		#clock-cells = <0>;
+	};
+
 	vccio_wifi: vccio-wifi {
 		compatible = "regulator-fixed";
 		regulator-name = "vccio_wifi";
@@ -451,17 +465,19 @@
 
 &gmac0 {
 	assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
-	assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>;
+	assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&gmac0_clkin>;
 	assigned-clock-rates = <0>, <125000000>;
-	clock_in_out = "output";
+	clock_in_out = "input";
 	phy-handle = <&rgmii_phy0>;
-	phy-mode = "rgmii-id";
+	phy-mode = "rgmii";
 	pinctrl-names = "default";
 	pinctrl-0 = <&gmac0_miim
 		     &gmac0_tx_bus2
 		     &gmac0_rx_bus2
 		     &gmac0_rgmii_clk
-		     &gmac0_rgmii_bus>;
+		     &gmac0_rgmii_bus
+		     &gmac0_clkinout
+		     &gmac0_rst>;
 	tx_delay = <0x3c>;
 	rx_delay = <0x2f>;
 	snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>;
@@ -473,17 +489,19 @@
 
 &gmac1 {
 	assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
-	assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>;
+	assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&gmac1_clkin>;
 	assigned-clock-rates = <0>, <125000000>;
-	clock_in_out = "output";
+	clock_in_out = "input";
 	phy-handle = <&rgmii_phy1>;
-	phy-mode = "rgmii-id";
+	phy-mode = "rgmii";
 	pinctrl-names = "default";
 	pinctrl-0 = <&gmac1m1_miim
 		     &gmac1m1_tx_bus2
 		     &gmac1m1_rx_bus2
 		     &gmac1m1_rgmii_clk
-		     &gmac1m1_rgmii_bus>;
+		     &gmac1m1_rgmii_bus
+		     &gmac1m1_clkinout
+		     &gmac1_rst>;
 	tx_delay = <0x4f>;
 	rx_delay = <0x26>;
 	snps,reset-gpio = <&gpio2 RK_PD1 GPIO_ACTIVE_LOW>;
@@ -921,11 +939,11 @@
 	};
 
 	gmac {
-		gmac0_int: gmac0-int {
-			rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
+		gmac0_rst: gmac0-rst {
+			rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
 		};
-		gmac1_int: gmac1-int {
-			rockchip,pins = <2 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
+		gmac1_rst: gmac1-rst {
+			rockchip,pins = <2 RK_PD1 RK_FUNC_GPIO &pcfg_pull_up>;
 		};
 	};
 

diff --git a/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-tlink-r7.dts b/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-tlink-r7.dts
@@ -232,6 +232,20 @@
 		post-power-on-delay-ms = <100>;
 	};
 
+	gmac0_clkin: external-gmac0-clock {
+		compatible = "fixed-clock";
+		clock-frequency = <125000000>;
+		clock-output-names = "gmac0_clkin";
+		#clock-cells = <0>;
+	};
+
+	gmac1_clkin: external-gmac1-clock {
+		compatible = "fixed-clock";
+		clock-frequency = <125000000>;
+		clock-output-names = "gmac1_clkin";
+		#clock-cells = <0>;
+	};
+
 	leds {
 		compatible = "gpio-leds";
 		status = "okay";
@@ -539,17 +553,19 @@
 
 &gmac0 {
 	assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
-	assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>;
+	assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&gmac0_clkin>;
 	assigned-clock-rates = <0>, <125000000>;
-	clock_in_out = "output";
+	clock_in_out = "input";
 	phy-handle = <&rgmii_phy0>;
-	phy-mode = "rgmii-id";
+	phy-mode = "rgmii";
 	pinctrl-names = "default";
 	pinctrl-0 = <&gmac0_miim
 		     &gmac0_tx_bus2
 		     &gmac0_rx_bus2
 		     &gmac0_rgmii_clk
-		     &gmac0_rgmii_bus>;
+		     &gmac0_rgmii_bus
+		     &gmac0_clkinout
+		     &gmac0_rst>;
 	tx_delay = <0x3c>;
 	rx_delay = <0x2f>;
 	snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>;
@@ -561,17 +577,19 @@
 
 &gmac1 {
 	assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
-	assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>;
+	assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&gmac1_clkin>;
 	assigned-clock-rates = <0>, <125000000>;
-	clock_in_out = "output";
+	clock_in_out = "input";
 	phy-handle = <&rgmii_phy1>;
-	phy-mode = "rgmii-id";
+	phy-mode = "rgmii";
 	pinctrl-names = "default";
 	pinctrl-0 = <&gmac1m1_miim
 		     &gmac1m1_tx_bus2
 		     &gmac1m1_rx_bus2
 		     &gmac1m1_rgmii_clk
-		     &gmac1m1_rgmii_bus>;
+		     &gmac1m1_rgmii_bus
+		     &gmac1m1_clkinout
+		     &gmac1_rst>;
 	tx_delay = <0x4f>;
 	rx_delay = <0x26>;
 	snps,reset-gpio = <&gpio2 RK_PD1 GPIO_ACTIVE_LOW>;
@@ -1031,11 +1049,11 @@
 	};
 
 	gmac {
-		gmac0_int: gmac0-int {
-			rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
+		gmac0_rst: gmac0-rst {
+			rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
 		};
-		gmac1_int: gmac1-int {
-			rockchip,pins = <2 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
+		gmac1_rst: gmac1-rst {
+			rockchip,pins = <2 RK_PD1 RK_FUNC_GPIO &pcfg_pull_up>;
 		};
 	};
 

diff --git a/target/linux/rockchip/image/armv8.mk b/target/linux/rockchip/image/armv8.mk
@@ -373,6 +373,7 @@ define Device/kooiot_tlink-r4x
 	kmod-usb-net-cdc-mbim kmod-usb-net-rndis \
 	kmod-usb-xhci-pci upd72020x-firmware \
 	kmod-i2c-fusb30x \
+	kmod-phy-realtek kmod-r8168 \
 	kmod-mmc kmod-brcmfmac \
 	kmod-can kmod-can-rockchip-canfd \
 	kmod-ata-ahci kmod-ata-ahci-dwc \
@@ -401,6 +402,7 @@ define Device/kooiot_tlink-r7
 	kmod-usb-net-cdc-mbim kmod-usb-net-rndis \
 	kmod-usb-xhci-pci upd72020x-firmware \
 	kmod-i2c-fusb30x \
+	kmod-phy-realtek kmod-r8168 \
 	kmod-mmc kmod-brcmfmac \
 	kmod-can kmod-can-rockchip-canfd \
 	kmod-ata-ahci kmod-ata-ahci-dwc \