Skip to content

Commit

Permalink
Merge pull request #445 from gdsports/fixesp8266
Browse files Browse the repository at this point in the history
Add RAM cache attribute to ISR
  • Loading branch information
jrowberg authored Dec 30, 2020
2 parents e75c80d + f6a7ef7 commit c4e96eb
Showing 1 changed file with 1 addition and 1 deletion.
Original file line number Diff line number Diff line change
Expand Up @@ -149,7 +149,7 @@ const unsigned int outPort = 9999; // remote port to receive OSC
// ================================================================

volatile bool mpuInterrupt = false; // indicates whether MPU interrupt pin has gone high
void dmpDataReady() {
void ICACHE_RAM_ATTR dmpDataReady() {
mpuInterrupt = true;
}

Expand Down

0 comments on commit c4e96eb

Please sign in to comment.