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Added more animations and transitions
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jamm-es committed Apr 23, 2024
1 parent a0a6e40 commit f5ac2a2
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4 changes: 2 additions & 2 deletions vga.cache/wt/project.wpc
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8 changes: 4 additions & 4 deletions vga.cache/wt/synthesis.wdf
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4 changes: 2 additions & 2 deletions vga.cache/wt/webtalk_pa.xml
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<!--The data in this file is primarily intended for consumption by Xilinx tools.
The structure and the elements are likely to change over the next few releases.
This means code written to parse this file will need to be revisited each subsequent release.-->
<application name="pa" timeStamp="Thu Apr 18 03:14:47 2024">
<application name="pa" timeStamp="Mon Apr 22 21:15:12 2024">
<section name="Project Information" visible="false">
<property name="ProjectID" value="c7c63fea56514c7bb820648bafdf87c8" type="ProjectID"/>
<property name="ProjectIteration" value="46" type="ProjectIteration"/>
<property name="ProjectIteration" value="47" type="ProjectIteration"/>
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<section name="PlanAhead Usage" visible="true">
<item name="Project Data">
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14 changes: 14 additions & 0 deletions vga.runs/.jobs/vrs_config_68.xml
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2 changes: 1 addition & 1 deletion vga.runs/impl_1/.init_design.begin.rst
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2 changes: 1 addition & 1 deletion vga.runs/impl_1/.opt_design.begin.rst
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2 changes: 1 addition & 1 deletion vga.runs/impl_1/.phys_opt_design.begin.rst
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<?xml version="1.0"?>
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2 changes: 1 addition & 1 deletion vga.runs/impl_1/.place_design.begin.rst
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2 changes: 1 addition & 1 deletion vga.runs/impl_1/.route_design.begin.rst
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27 changes: 1 addition & 26 deletions vga.runs/impl_1/.vivado.begin.rst
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2 changes: 1 addition & 1 deletion vga.runs/impl_1/.write_bitstream.begin.rst
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2 changes: 1 addition & 1 deletion vga.runs/impl_1/clockInfo.txt
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-------------------------------------
| Tool Version : Vivado v.2023.2
| Date : Thu Apr 18 03:15:20 2024
| Date : Mon Apr 22 21:23:41 2024
| Host : me
| Design : design_1
| Device : xc7a100t-csg324-1--
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28 changes: 12 additions & 16 deletions vga.runs/impl_1/gen_run.xml
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<?xml version="1.0" encoding="UTF-8"?>
<GenRun Id="impl_1" LaunchPart="xc7a100tcsg324-1" LaunchTime="1713435287">
<GenRun Id="impl_1" LaunchPart="xc7a100tcsg324-1" LaunchTime="1713845712">
<File Type="ROUTE-PWR" Name="vga_power_routed.rpt"/>
<File Type="PA-TCL" Name="vga.tcl"/>
<File Type="ROUTE-PWR-SUM" Name="vga_power_summary_routed.pb"/>
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<Attr Name="UsedIn" Val="simulation"/>
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</Config>
</FileSet>
<Strategy Version="1" Minor="2">
<StratHandle Name="Vivado Implementation Defaults" Flow="Vivado Implementation 2023">
<Desc>Default settings for Implementation.</Desc>
</StratHandle>
<StratHandle Name="Vivado Implementation Defaults" Flow="Vivado Implementation 2023"/>
<Step Id="init_design"/>
<Step Id="opt_design"/>
<Step Id="power_opt_design"/>
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