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update to linux 6.6-rc6 and disable non-working nodes
Signed-off-by: John Clark <[email protected]>
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dtb/patches/0001-riscv-dts-starfive-Add-mmc-nodes-on-VisionFive-2-boa.patch
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dtb/patches/0001-riscv-dts-starfive-visionfive-2-disable-qspi-tdm-and.patch
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@@ -0,0 +1,45 @@ | ||
From 2fd2c6449c28d1b215acfe9ed42c2c040cfcb12b Mon Sep 17 00:00:00 2001 | ||
From: John Clark <[email protected]> | ||
Date: Thu, 19 Oct 2023 17:28:25 +0000 | ||
Subject: [PATCH 1/2] riscv: dts: starfive: visionfive 2: disable qspi, tdm, | ||
and usb0 nodes | ||
|
||
Signed-off-by: John Clark <[email protected]> | ||
--- | ||
.../boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi | 6 +++--- | ||
1 file changed, 3 insertions(+), 3 deletions(-) | ||
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diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi | ||
index 12ebe97..eadd6ca 100644 | ||
--- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi | ||
+++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi | ||
@@ -235,7 +235,7 @@ | ||
&qspi { | ||
#address-cells = <1>; | ||
#size-cells = <0>; | ||
- status = "okay"; | ||
+ status = "disabled"; | ||
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||
nor_flash: flash@0 { | ||
compatible = "jedec,spi-nor"; | ||
@@ -502,7 +502,7 @@ | ||
&tdm { | ||
pinctrl-names = "default"; | ||
pinctrl-0 = <&tdm_pins>; | ||
- status = "okay"; | ||
+ status = "disabled"; | ||
}; | ||
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&uart0 { | ||
@@ -513,7 +513,7 @@ | ||
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&usb0 { | ||
dr_mode = "peripheral"; | ||
- status = "okay"; | ||
+ status = "disabled"; | ||
}; | ||
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&U74_1 { | ||
-- | ||
2.40.1 | ||
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37 changes: 37 additions & 0 deletions
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dtb/patches/0002-iscv-dts-starfive-jh7110-remove-PLL-clocks-source-in.patch
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From d8472de8b0a0cdc22d8d4b6d3ffbbefb9de28acf Mon Sep 17 00:00:00 2001 | ||
From: John Clark <[email protected]> | ||
Date: Thu, 19 Oct 2023 17:36:51 +0000 | ||
Subject: [PATCH 2/2] iscv: dts: starfive: jh7110: remove PLL clocks source in | ||
SYSCRG node | ||
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||
Signed-off-by: John Clark <[email protected]> | ||
--- | ||
arch/riscv/boot/dts/starfive/jh7110.dtsi | 8 ++------ | ||
1 file changed, 2 insertions(+), 6 deletions(-) | ||
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diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi | ||
index e85464c..660b444 100644 | ||
--- a/arch/riscv/boot/dts/starfive/jh7110.dtsi | ||
+++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi | ||
@@ -774,16 +774,12 @@ | ||
<&gmac1_rgmii_rxin>, | ||
<&i2stx_bclk_ext>, <&i2stx_lrck_ext>, | ||
<&i2srx_bclk_ext>, <&i2srx_lrck_ext>, | ||
- <&tdm_ext>, <&mclk_ext>, | ||
- <&pllclk JH7110_PLLCLK_PLL0_OUT>, | ||
- <&pllclk JH7110_PLLCLK_PLL1_OUT>, | ||
- <&pllclk JH7110_PLLCLK_PLL2_OUT>; | ||
+ <&tdm_ext>, <&mclk_ext>; | ||
clock-names = "osc", "gmac1_rmii_refin", | ||
"gmac1_rgmii_rxin", | ||
"i2stx_bclk_ext", "i2stx_lrck_ext", | ||
"i2srx_bclk_ext", "i2srx_lrck_ext", | ||
- "tdm_ext", "mclk_ext", | ||
- "pll0_out", "pll1_out", "pll2_out"; | ||
+ "tdm_ext", "mclk_ext"; | ||
#clock-cells = <1>; | ||
#reset-cells = <1>; | ||
}; | ||
-- | ||
2.40.1 | ||
|
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