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Connection between two QEMU MCUs #29

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T0jan opened this issue Oct 13, 2016 · 9 comments
Closed

Connection between two QEMU MCUs #29

T0jan opened this issue Oct 13, 2016 · 9 comments

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@T0jan
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T0jan commented Oct 13, 2016

Hey there,
This more an question than an real issue. For testing purposes I try to connect two STM32 emulated with the GNU ARM Eclipse QEMU over UART with each other. The code is already tested with two OLIMEX STM32-P103 boards. The reason i want to realize this also with QEMU is that i want to test the UART communication between this two MCUs already if the boards I want to put them on aren't finished.
So now to my question: I'm a newbie in QEMU but if I understand it right the -serial addition to the command line connects one of the serial ports of the MCU with the port defined afterwards. My idea was to use -serial pty on the master MCU to etablish a new virtual port for this conversation and then connect the slave MCU via -serial /dev/pts/XX to that port. On the good side the starting process with both MCUs on QEMU runs without errors. But there happens no communication between these two both hanging in their request sending state but doesn't trigger any other action. So is it possible to handle my tries on this way?
In relation to this I also have a question to the GDB session the plug-in starts: In which way it establish its connection to the MCU and does it maybe use the USART1 port?
And in addition I want to ask also if it is possible to get a view on the full output of QEMU. Because if I want to execute standard QEMU commands like info or even help QEMU never generates any output.
Thanks.

@ilg-ul
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ilg-ul commented Oct 13, 2016

your idea to connect two emulated devices via pty devices is interesting, but I do not know how far went the implementation to support this.

unfortunately I do not have any documentation on this, you need to check the qemu source code. limited usart support for some stm32 devices was contributed by users, and I do not have experience using it.

if I were in your place, I would do the following:

  • write two posix programs, running on mac or linux, to communicate over a pty.
  • rewrite one of these two programs to run on cortexm, and try to communicate with the other native project
  • if problems arise, fix the qemu usart implementation
  • when the first half is functional, rewrite the second program to run on cortexm, and try to communicate with the other qemu
  • if problems arise, fix the qemu usart implementation

@T0jan
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T0jan commented Oct 13, 2016

thanks for the fast response, i will try to get some results on the way you recommended and I will share the fixes for qemu here.

Or do you may have have other ideas to realize an serial connection between two STM32 virtual?

@ilg-ul
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ilg-ul commented Oct 13, 2016

yes, please share your experience with other users.

for general discussions please use the project forum, and keep this tracker for bugs and enhancements only.

@T0jan
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T0jan commented Oct 18, 2016

ok I could set up an basic setup in the way I told on top with creating an new PTY and then connect with the second device to it. I used an light modified version of beckus STM32 QEMU which seems to be also the foundation of your STM32 implemention.

So with this dedicated version it works fine, but if I want to reproduce the results with your plug-in, UART doesn't work. I think it has something to do with the UART handling of the plug-in which caused you some trouble before.

I tried it with the 2.4.50-201510290935-dev build of QEMU which doesn't had the mentioned problems with UART.

@ilg-ul
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ilg-ul commented Oct 18, 2016

the UART code in GNU ARM Eclipse QEMU was contributed by someone else and I had no time to check it.

so, if you identify problems and can find solutions to fix it, please let me know.

during the next days I plan to update to qemu 2.7, and then perhaps I have a few days to fix some pending issues, before making a new release.

@T0jan
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T0jan commented Oct 18, 2016

well, what I can say after a short look in the stm32_usart.c here in this QEMU version is, that it seems to have only functions for STM32F4xx and some status queries but nothing for a transmit with basic STM32 controllers.
If I take a look in beckus UART implementation here: https://github.com/beckus/qemu_stm32/blob/stm32/hw/char/stm32_uart.c
I see way more functions for different purposes. I can't tell if the contributer of the UART code placed them somewhere else, but with my minimal knowledge about QEMU source code, I cant clear this point completely.

@ilg-ul
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ilg-ul commented Oct 18, 2016

I currently do not have a serial port on my mac, so I'm afraid I cannot test any serial code, but if you want to contribute, I can review it.

@T0jan
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T0jan commented Oct 18, 2016

it would be a pleasure for me to help you, but the only kind of contribution i can offer is testing any new version you offer for the serial implementation.

@ilg-ul
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ilg-ul commented Oct 18, 2016

it would be a pleasure for me to help

thank you, I appreciate it.

new version you offer for the serial implementation.

given the lack of resources, I cannot commit on this, but perhaps you could contact the original contributor, maybe he can further improve the USART code.

ilg-ul pushed a commit that referenced this issue Oct 26, 2016
ahci-test /x86_64/ahci/io/dma/lba28/retry triggers the following leak:

Direct leak of 16 byte(s) in 1 object(s) allocated from:
    #0 0x7fc4b2a25e20 in malloc (/lib64/libasan.so.3+0xc6e20)
    #1 0x7fc4993bce58 in g_malloc (/lib64/libglib-2.0.so.0+0x4ee58)
    #2 0x556a187d4b34 in ahci_populate_sglist hw/ide/ahci.c:896
    #3 0x556a187d8237 in ahci_dma_prepare_buf hw/ide/ahci.c:1367
    #4 0x556a187b5a1a in ide_dma_cb hw/ide/core.c:844
    #5 0x556a187d7eec in ahci_start_dma hw/ide/ahci.c:1333
    #6 0x556a187b650b in ide_start_dma hw/ide/core.c:921
    #7 0x556a187b61e6 in ide_sector_start_dma hw/ide/core.c:911
    #8 0x556a187b9e26 in cmd_write_dma hw/ide/core.c:1486
    #9 0x556a187bd519 in ide_exec_cmd hw/ide/core.c:2027
    #10 0x556a187d71c5 in handle_reg_h2d_fis hw/ide/ahci.c:1204
    #11 0x556a187d7681 in handle_cmd hw/ide/ahci.c:1254
    #12 0x556a187d168a in check_cmd hw/ide/ahci.c:510
    #13 0x556a187d0afc in ahci_port_write hw/ide/ahci.c:314
    #14 0x556a187d105d in ahci_mem_write hw/ide/ahci.c:435
    #15 0x556a1831d959 in memory_region_write_accessor /home/elmarco/src/qemu/memory.c:525
    #16 0x556a1831dc35 in access_with_adjusted_size /home/elmarco/src/qemu/memory.c:591
    #17 0x556a18323ce3 in memory_region_dispatch_write /home/elmarco/src/qemu/memory.c:1262
    #18 0x556a1828cf67 in address_space_write_continue /home/elmarco/src/qemu/exec.c:2578
    #19 0x556a1828d20b in address_space_write /home/elmarco/src/qemu/exec.c:2635
    #20 0x556a1828d92b in address_space_rw /home/elmarco/src/qemu/exec.c:2737
    #21 0x556a1828daf7 in cpu_physical_memory_rw /home/elmarco/src/qemu/exec.c:2746
    #22 0x556a183068d3 in cpu_physical_memory_write /home/elmarco/src/qemu/include/exec/cpu-common.h:72
    #23 0x556a18308194 in qtest_process_command /home/elmarco/src/qemu/qtest.c:382
    #24 0x556a18309999 in qtest_process_inbuf /home/elmarco/src/qemu/qtest.c:573
    #25 0x556a18309a4a in qtest_read /home/elmarco/src/qemu/qtest.c:585
    #26 0x556a18598b85 in qemu_chr_be_write_impl /home/elmarco/src/qemu/qemu-char.c:387
    #27 0x556a18598c52 in qemu_chr_be_write /home/elmarco/src/qemu/qemu-char.c:399
    #28 0x556a185a2afa in tcp_chr_read /home/elmarco/src/qemu/qemu-char.c:2902
    #29 0x556a18cbaf52 in qio_channel_fd_source_dispatch io/channel-watch.c:84

Follow John Snow recommendation:
  Everywhere else ncq_err is used, it is accompanied by a list cleanup
  except for ncq_cb, which is the case you are fixing here.

  Move the sglist destruction inside of ncq_err and then delete it from
  the other two locations to keep it tidy.

  Call dma_buf_commit in ide_dma_cb after the early return. Though, this
  is also a little wonky because this routine does more than clear the
  list, but it is at the moment the centralized "we're done with the
  sglist" function and none of the other side effects that occur in
  dma_buf_commit will interfere with the reset that occurs from
  ide_restart_bh, I think

Signed-off-by: Marc-André Lureau <[email protected]>
Reviewed-by: John Snow <[email protected]>
@ilg-ul ilg-ul closed this as completed Oct 29, 2016
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