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riscv: Initial vertexjit #16957

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Feb 13, 2023
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4 changes: 4 additions & 0 deletions CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -1485,6 +1485,10 @@ list(APPEND CoreExtra
Core/MIPS/MIPS/MipsJit.h
)

list(APPEND CoreExtra
GPU/Common/VertexDecoderRiscV.cpp
)

if(NOT MOBILE_DEVICE)
set(CoreExtra ${CoreExtra}
Core/AVIDump.cpp
Expand Down
2 changes: 2 additions & 0 deletions Common/CommonFuncs.h
Original file line number Diff line number Diff line change
Expand Up @@ -36,6 +36,8 @@
#define Crash() {asm ("bkpt #0");}
#elif PPSSPP_ARCH(ARM64)
#define Crash() {asm ("brk #0");}
#elif PPSSPP_ARCH(RISCV64)
#define Crash() {asm ("ebreak");}
#else
#include <signal.h>
#define Crash() {kill(getpid(), SIGINT);}
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22 changes: 20 additions & 2 deletions Common/RiscVEmitter.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1021,8 +1021,12 @@ void RiscVEmitter::ReserveCodeSpace(u32 bytes) {
_assert_msg_((bytes & 3) == 0 || SupportsCompressed(), "Code space should be aligned (no compressed)");
for (u32 i = 0; i < bytes / 4; i++)
EBREAK();
if (bytes & 2)
Write16(0);
if (bytes & 2) {
if (SupportsCompressed())
C_EBREAK();
else
Write16(0);
}
}

const u8 *RiscVEmitter::AlignCode16() {
Expand Down Expand Up @@ -4278,4 +4282,18 @@ void RiscVEmitter::C_SDSP(RiscVReg rs2, u32 uimm9) {
Write16(EncodeCSS(Opcode16::C2, rs2, imm5_4_3_8_7_6, Funct3::C_SDSP));
}

void RiscVCodeBlock::PoisonMemory(int offset) {
// So we can adjust region to writable space. Might be zero.
ptrdiff_t writable = writable_ - code_;

u32 *ptr = (u32 *)(region + offset + writable);
u32 *maxptr = (u32 *)(region + region_size - offset + writable);
// This will only write an even multiple of u32, but not much else to do.
// RiscV: 0x00100073 = EBREAK, 0x9002 = C.EBREAK
while (ptr + 1 <= maxptr)
*ptr++ = 0x00100073;
if (SupportsCompressed() && ptr < maxptr && (intptr_t)maxptr - (intptr_t)ptr >= 2)
*(u16 *)ptr = 0x9002;
}

};
7 changes: 5 additions & 2 deletions Common/RiscVEmitter.h
Original file line number Diff line number Diff line change
Expand Up @@ -47,6 +47,8 @@ enum RiscVReg {
V8, V9, V10, V11, V12, V13, V14, V15,
V16, V17, V18, V19, V20, V21, V22, V23,
V24, V25, V26, V27, V28, V29, V30, V31,

INVALID_REG = 0xFFFFFFFF,
};

enum class FixupBranchType {
Expand Down Expand Up @@ -302,7 +304,7 @@ class RiscVEmitter {
void ECALL();
void EBREAK();

// 64-bit instructions - oens ending in W sign extend result to 32 bits.
// 64-bit instructions - ones ending in W sign extend result to 32 bits.
void LWU(RiscVReg rd, RiscVReg addr, s32 simm12);
void LD(RiscVReg rd, RiscVReg addr, s32 simm12);
void SD(RiscVReg rs2, RiscVReg addr, s32 simm12);
Expand Down Expand Up @@ -1024,13 +1026,14 @@ class RiscVEmitter {
writable_ += 2;
}

protected:
const u8 *code_ = nullptr;
u8 *writable_ = nullptr;
const u8 *lastCacheFlushEnd_ = nullptr;
bool autoCompress_ = false;
};

class MIPSCodeBlock : public CodeBlock<RiscVEmitter> {
class RiscVCodeBlock : public CodeBlock<RiscVEmitter> {
private:
void PoisonMemory(int offset) override;
};
Expand Down
2 changes: 2 additions & 0 deletions Core/Dialog/PSPOskDialog.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -350,6 +350,7 @@ int PSPOskDialog::Init(u32 oskPtr) {

// Eat any keys pressed before the dialog inited.
UpdateButtons();
InitCommon();

std::lock_guard<std::mutex> guard(nativeMutex_);
nativeStatus_ = PSPOskNativeStatus::IDLE;
Expand Down Expand Up @@ -954,6 +955,7 @@ int PSPOskDialog::Update(int animSpeed) {
const int framesHeldRepeatRate = 5;

UpdateButtons();
UpdateCommon();
int selectedRow = selectedChar / numKeyCols[currentKeyboard];
int selectedExtra = selectedChar % numKeyCols[currentKeyboard];

Expand Down
2 changes: 1 addition & 1 deletion Core/MIPS/JitCommon/JitBlockCache.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -698,7 +698,7 @@ JitBlockDebugInfo JitBlockCache::GetBlockDebugInfo(int blockNum) const {
debugInfo.targetDisasm = DisassembleArm64(block->normalEntry, block->codeSize);
#elif PPSSPP_ARCH(X86) || PPSSPP_ARCH(AMD64)
debugInfo.targetDisasm = DisassembleX86(block->normalEntry, block->codeSize);
#elif PPSSPP_ARCH(ARM64)
#elif PPSSPP_ARCH(RISCV64)
debugInfo.targetDisasm = DisassembleRV64(block->normalEntry, block->codeSize);
#endif

Expand Down
2 changes: 1 addition & 1 deletion Core/MIPS/JitCommon/JitState.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -60,7 +60,7 @@ namespace MIPSComp {

useStaticAlloc = false;
enablePointerify = false;
#if PPSSPP_ARCH(ARM64)
#if PPSSPP_ARCH(ARM64) || PPSSPP_ARCH(RISCV64)
useStaticAlloc = !Disabled(JitDisable::STATIC_ALLOC);
// iOS/etc. may disable at runtime if Memory::base is not nicely aligned.
enablePointerify = !Disabled(JitDisable::POINTERIFY);
Expand Down
2 changes: 1 addition & 1 deletion GPU/Common/VertexDecoderArm64.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -722,7 +722,7 @@ void VertexDecoderJitCache::Jit_NormalS16() {

void VertexDecoderJitCache::Jit_NormalFloat() {
// Only need to copy 12 bytes, but copying 16 should be okay (and is faster.)
if ((dec_->posoff & 7) == 0 && (dec_->decFmt.posoff & 7) == 0) {
if ((dec_->nrmoff & 7) == 0 && (dec_->decFmt.nrmoff & 7) == 0) {
LDP(INDEX_SIGNED, EncodeRegTo64(tempReg1), EncodeRegTo64(tempReg2), srcReg, dec_->nrmoff);
STP(INDEX_SIGNED, EncodeRegTo64(tempReg1), EncodeRegTo64(tempReg2), dstReg, dec_->decFmt.nrmoff);
} else {
Expand Down
4 changes: 4 additions & 0 deletions GPU/Common/VertexDecoderCommon.h
Original file line number Diff line number Diff line change
Expand Up @@ -37,6 +37,8 @@
#include "Common/Arm64Emitter.h"
#elif PPSSPP_ARCH(X86) || PPSSPP_ARCH(AMD64)
#include "Common/x64Emitter.h"
#elif PPSSPP_ARCH(RISCV64)
#include "Common/RiscVEmitter.h"
#else
#include "Common/FakeEmitter.h"
#endif
Expand Down Expand Up @@ -489,6 +491,8 @@ class VertexDecoder {
#define VERTEXDECODER_JIT_BACKEND Arm64Gen::ARM64CodeBlock
#elif PPSSPP_ARCH(X86) || PPSSPP_ARCH(AMD64)
#define VERTEXDECODER_JIT_BACKEND Gen::XCodeBlock
#elif PPSSPP_ARCH(RISCV64)
#define VERTEXDECODER_JIT_BACKEND RiscVGen::RiscVCodeBlock
#endif


Expand Down
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