Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Jump to bottom

interp: Handle jumps in branch delay slots better #15952

Merged
merged 1 commit into from
Sep 3, 2022
Merged

interp: Handle jumps in branch delay slots better #15952

Changes from all commits
Commits
Show all changes
1 commit
Select commit
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
37 changes: 23 additions & 14 deletions Core/MIPS/MIPSInt.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -65,10 +65,15 @@ static inline void DelayBranchTo(u32 where)
mipsr4k.inDelaySlot = true;
}

static inline void SkipLikely()
{
PC += 8;
--mipsr4k.downcount;
static inline void SkipLikely() {
MIPSInfo delaySlot = MIPSGetInfo(Memory::Read_Instruction(PC + 4, true));
// Don't actually skip if it is a jump (seen in Brooktown High.)
if (delaySlot & IS_JUMP) {
PC += 4;
} else {
PC += 8;
--mipsr4k.downcount;
}
}

int MIPS_SingleStep()
Expand Down Expand Up @@ -246,17 +251,21 @@ namespace MIPSInt
void Int_JumpType(MIPSOpcode op)
{
if (mipsr4k.inDelaySlot)
_dbg_assert_msg_(false,"Jump in delay slot :(");
ERROR_LOG(CPU, "Jump in delay slot :(");

u32 off = ((op & 0x03FFFFFF) << 2);
u32 addr = (currentMIPS->pc & 0xF0000000) | off;

switch (op>>26)
{
case 2: DelayBranchTo(addr); break; //j
case 2: //j
if (!mipsr4k.inDelaySlot)
DelayBranchTo(addr);
break;
case 3: //jal
R(31) = PC + 8;
DelayBranchTo(addr);
R(MIPS_REG_RA) = PC + 8;
if (!mipsr4k.inDelaySlot)
DelayBranchTo(addr);
break;
default:
_dbg_assert_msg_(false,"Trying to interpret instruction that can't be interpreted");
Expand All @@ -268,11 +277,8 @@ namespace MIPSInt
{
if (mipsr4k.inDelaySlot)
{
// There's one of these in Star Soldier at 0881808c, which seems benign - it should probably be ignored.
if (op == 0x03e00008)
return;
// There's one of these in Star Soldier at 0881808c, which seems benign.
ERROR_LOG(CPU, "Jump in delay slot :(");
_dbg_assert_msg_(false,"Jump in delay slot :(");
}

int rs = _RS;
Expand All @@ -281,12 +287,15 @@ namespace MIPSInt
switch (op & 0x3f)
{
case 8: //jr
DelayBranchTo(addr);
if (!mipsr4k.inDelaySlot)
DelayBranchTo(addr);
break;
case 9: //jalr
if (rd != 0)
R(rd) = PC + 8;
DelayBranchTo(addr);
// Update rd, but otherwise do not take the branch if we're branching.
if (!mipsr4k.inDelaySlot)
DelayBranchTo(addr);
break;
}
}
Expand Down