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Black screen GTA Vice City Stories, Tekken 6, Gran Turismo #15735

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2 of 5 tasks
schneizel808 opened this issue Jul 27, 2022 · 9 comments · Fixed by #15739
Closed
2 of 5 tasks

Black screen GTA Vice City Stories, Tekken 6, Gran Turismo #15735

schneizel808 opened this issue Jul 27, 2022 · 9 comments · Fixed by #15739
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GE emulation Backend-independent GPU issues Platform-specific (iOS)
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@schneizel808
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Game or games this happens in

GTA Vice City Stories, Tekken 6, Gran Turismo

What area of the game / PPSSPP

Black screen when opening these games.

I'm using Ipad Pro IOS 15.5

What should happen

Should load correctly.

Logs

No response

Platform

iOS

Mobile phone model or graphics card

Ipad Pro 12.9

PPSSPP version affected

v1.13

Last working version

No response

Graphics backend (3D API)

OpenGL / GLES

Checklist

  • Test in the latest git build in case it's already fixed.
  • Search for other reports of the same issue.
  • Try resetting settings or older versions and include if the issue is related.
  • Try without any cheats and without loading any save states.
  • Include logs or screenshots of issue.
@hrydgard hrydgard added Platform-specific (iOS) GE emulation Backend-independent GPU issues labels Jul 27, 2022
@hrydgard
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hrydgard commented Jul 27, 2022

What's the last version that worked for you?

(There were some changes recently to the IR interpreter, something might have broken..)

@hrydgard hrydgard added this to the Future-Prio milestone Jul 27, 2022
@anr2me
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anr2me commented Jul 27, 2022

On Windows, with IR interpreter:
Tekken 6 = black screen
GTA VCS = crashing ppsspp (even with fastmem disabled)
GT = can't reproduce

@hrydgard
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Thanks for testing ANR2ME, I'll look into it as well.

@anr2me
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anr2me commented Jul 27, 2022

The crash on GTA seems to be similar to GoW Ghost of Sparta #14958 (comment)
image
v1.12.3 didn't crashed tho

@hrydgard hrydgard modified the milestones: Future-Prio, v1.13.1 Jul 27, 2022
@anr2me
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anr2me commented Jul 27, 2022

Okay, it started to crash with this commit:

Commit: 2154f747fccdd4eeafb3976213c5737454578d76 [2154f74]
Parents: 8f23025209
Author: Unknown W. Brackets <...>
Date: Sun, 24 July 2022 10:44:59
Committer: Unknown W. Brackets
Commit Date: Sun, 24 July 2022 11:35:54
irjit: Simplify more arithmetic to Movs.

Later passes rely on things being Mov, so better to have them more often.

@hrydgard
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Oh darn I just bisected it down to the same, linking: 2154f74 .

hrydgard referenced this issue Jul 27, 2022
Later passes rely on things being Mov, so better to have them more often.
hrydgard added a commit that referenced this issue Jul 27, 2022
Fixes #15735

Though the real problem might be in PurgeTemps.
@hrydgard
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Posted more info in my PR #15736, the bug appears to be in PurgeTemps.

@schneizel808
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What's the last version that worked for you?

(There were some changes recently to the IR interpreter, something might have broken..)

last version that's working for me was 1.12.3-1437

@unknownbrackets
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GTA LCS performs the "Mov A, B; Add C, C, A" to "Mov A, B; Add C, C, B" optimization 1249 times. Of those, I determined that optimizations 749 and 750 must be disabled to prevent this bug.

Here's the MIPS, original IR, and both the disabled and crashing IR:

=============== mips 089d96f0 ===============
M: 089d96f0   lwr t0, 0x0(a1)
M: 089d96f4   addu a1, a1, t1
M: 089d96f8   swr t0, 0x0(a0)
M: 089d96fc   addu a0, a0, t1
M: 089d9700   andi t1, a2, 0xF
M: 089d9704   beq t1, a2, ->$089d9710
M: 089d9708   andi a3, a3, 0xF

=============== Original IR (9 instructions) ===============
Load32Right t0, a1, 00000000
Add a1, a1, t1
Store32Right t0, a0, 00000000
Add a0, a0, t1
AndConst t1, a2, 0000000f
AndConst a3, a3, 0000000f
Downcount 00000007
ExitIfNeq 089d970c, t1, a2
Exit 089d9710

=============== IR (32 instructions) =============== (working)
AndConst irtemp_shift, a1, 00000003
ShlImm irtemp_shift, irtemp_shift, 03
Load32 irtemp_value, a1, 00000000
Shr irtemp_value, irtemp_value, irtemp_shift
Neg irtemp_shift, irtemp_shift
AddConst irtemp_shift, irtemp_shift, 00000018
SetConst irtemp_mask, ffffff00
Shl irtemp_mask, irtemp_mask, irtemp_shift
And t0, t0, irtemp_mask
Or t0, t0, irtemp_value
Add a1, a1, t1
Mov irtemp_addr, a0
AndConst irtemp_shift, a0, 00000003
ShlImm irtemp_shift, irtemp_shift, 03
AndConst irtemp_addr, a0, fffffffc
Load32 irtemp_value, irtemp_addr, 00000000
Neg irtemp_shift, irtemp_shift
AddConst irtemp_shift, irtemp_shift, 00000018
SetConst irtemp_mask, 00ffffff
Shr irtemp_mask, irtemp_mask, irtemp_shift
And irtemp_value, irtemp_value, irtemp_mask
Neg irtemp_shift, irtemp_shift
AddConst irtemp_shift, irtemp_shift, 00000018
Shl irtemp_mask, t0, irtemp_shift
Or irtemp_value, irtemp_value, irtemp_mask
Store32 irtemp_value, irtemp_addr, 00000000
Add a0, a0, t1
AndConst t1, a2, 0000000f
AndConst a3, a3, 0000000f
Downcount 00000007
ExitIfNeq 089d970c, t1, a2
Exit 089d9710

=============== IR (30 instructions) =============== (crash)
AndConst irtemp_shift, a1, 00000003
ShlImm irtemp_shift, irtemp_shift, 03
Load32 irtemp_value, a1, 00000000
Shr irtemp_value, irtemp_value, irtemp_shift
Neg irtemp_shift, irtemp_shift
AddConst irtemp_shift, irtemp_shift, 00000018
SetConst irtemp_mask, ffffff00
Shl irtemp_mask, irtemp_mask, irtemp_shift
And t0, t0, irtemp_mask
Or t0, t0, irtemp_value
Add a1, a1, t1
AndConst irtemp_shift, a0, 00000003
ShlImm irtemp_shift, irtemp_shift, 03
Load32 irtemp_value, a0, 00000000
Neg irtemp_shift, irtemp_shift
AddConst irtemp_shift, irtemp_shift, 00000018
SetConst irtemp_mask, 00ffffff
Shr irtemp_mask, irtemp_mask, irtemp_shift
And irtemp_value, irtemp_value, irtemp_mask
Neg irtemp_shift, irtemp_shift
AddConst irtemp_shift, irtemp_shift, 00000018
Shl irtemp_mask, t0, irtemp_shift
Or irtemp_value, irtemp_value, irtemp_mask
Store32 irtemp_value, a0, 00000000
Add a0, a0, t1
AndConst t1, a2, 0000000f
AndConst a3, a3, 0000000f
Downcount 00000007
ExitIfNeq 089d970c, t1, a2
Exit 089d9710

The relevant part is:

--- good
+++ bad
@@ -10,9 +10,7 @@
 Or t0, t0, irtemp_value
 Add a1, a1, t1
-Mov irtemp_addr, a0
 AndConst irtemp_shift, a0, 00000003
 ShlImm irtemp_shift, irtemp_shift, 03
-AndConst irtemp_addr, a0, fffffffc
-Load32 irtemp_value, irtemp_addr, 00000000
+Load32 irtemp_value, a0, 00000000
 Neg irtemp_shift, irtemp_shift
 AddConst irtemp_shift, irtemp_shift, 00000018
@@ -24,5 +22,5 @@
 Shl irtemp_mask, t0, irtemp_shift
 Or irtemp_value, irtemp_value, irtemp_mask
-Store32 irtemp_value, irtemp_addr, 00000000
+Store32 irtemp_value, a0, 00000000
 Add a0, a0, t1
 AndConst t1, a2, 0000000f

My immediate reaction is that removing AndConst irtemp_addr, a0, fffffffc looks wrong, I don't think it can optimize this case out since a0 is not overwritten. Let's see.

-[Unknown]

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Labels
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